Memory Device Column-Based Error Code Tracking
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Solution Overview
Problem
Existing memory systems face limitations in error correction due to overhead from error codes, which can only effectively correct a single-bit error per word, leading to premature failure of memory components when multiple errors occur.
Innovation Solution
A memory device architecture that includes a tag column for storing error information, allowing for column-based error code tracking and repair, where spare bits are used to repair errors based on tag information, thereby extending the error correction capability beyond single-bit errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error codes are used to detect and correct errors in data transmission and storage, then error detection and correction capability is improved, but the overhead from encoding limits the effectiveness to single-bit error correction only
Solution Approach 1:
The patent segments the memory array into columns with dedicated tag storage, separating error tracking functionality from the main data storage. Each column has its own tag that tracks error status independently, allowing multiple errors to be detected and corrected without increasing the overhead of the error correction code itself.
Solution Approach 2:
The patent introduces tag information as an intermediary between the error detection mechanism and the data storage. These tags act as mediators that track error locations and enable repair operations, allowing the system to handle multiple errors without requiring more complex encoding overhead.
2Reliability
If traditional error codes are employed, then single-bit error correction is achieved, but multiple hard errors cause the memory component to fail prematurely
Solution Approach 1:
The patent performs preliminary actions by pre-allocating tag storage spaces in each column and pre-establishing repair mechanisms. When errors occur, the tags are updated in advance to track error locations, enabling the system to repair multiple errors before they cause premature failure, thus extending memory component lifespan.
Solution Approach 2:
The patent implements feedback mechanisms where tag information continuously monitors error status in each column and provides feedback to the repair mechanism. This feedback loop enables the system to detect, track, and repair multiple errors dynamically, preventing premature failure and extending the operational lifespan of the memory component.
3Productivity
If memory devices are assembled onto memory modules, then system integration is improved, but modules are discarded for failing to pass final testing due to accumulated errors
Solution Approach 1:
The patent enables memory modules to perform self-diagnosis and self-repair through the tag-based error tracking mechanism. Each column's tag independently monitors error status, allowing the module to detect and repair errors autonomously during final testing, reducing discards due to accumulated errors and improving both productivity and reliability.
Data Source
AI summary
A memory device is disclosed that includes a row of storage locations that form plural columns. The plural columns include data columns to store data and a tag column to store tag information associated with error locations in the data columns. Each data column is associated with an error correction location including an error code bit location. Logic retrieves and stores the tag information associated with the row in response to activation of the row. A bit error in an accessed data column is repaired by a spare bit location based on the tag information.