Memory Device Deduplication via Hash Table and Controller

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Solution Overview

Problem

Existing data deduplication processes in virtual environments are slow due to being performed as an auxiliary task by the CPU, which disrupts other CPU tasks and reduces efficiency in memory usage.

Innovation Solution

A memory device with a hash table, memory cell unit, and controller that compares page contents with the same hash value during CPU idle time, allowing for efficient identification and removal of duplicate pages, thereby reducing memory usage and enhancing system performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data deduplication is carried out by CPU as an auxiliary task, then data deduplication can be performed without disrupting other CPU tasks, but the data deduplication process becomes slow

Engineering Contradiction:
Improvedata deduplication speedVSAvoidCPU idle time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The memory device performs data deduplication autonomously using its own controller and comparator without requiring CPU intervention. The memory device identifies duplicate pages by comparing hash values and page contents independently, allowing the CPU to focus on its primary tasks while the memory device handles deduplication in the background, thus improving deduplication speed without significantly impacting CPU performance

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent introduces a hash table as an intermediary data structure that stores hash values of page contents. This hash table enables efficient duplicate detection by allowing the memory device to quickly compare new pages against existing pages through hash value matching, significantly accelerating the deduplication process compared to direct content comparison, while the operation remains transparent to the CPU

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If data deduplication is performed continuously, then memory usage efficiency is improved, but system performance may be disrupted due to CPU involvement

Engineering Contradiction:
Improvememory usage efficiencyVSAvoidsystem performance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent implements periodic data deduplication by triggering the deduplication process based on specific conditions such as when a threshold number of pages are stored in memory or at scheduled intervals. This periodic approach allows the system to maintain memory efficiency through regular deduplication while avoiding continuous CPU involvement that would disrupt system performance, as the memory device autonomously executes these periodic operations

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS8732434B2Memory device, computer system including the same, and operating methods thereof
Publication Date: 2014.05.20 SAMSUNG ELECTRONICS CO LTD
  • US8732434B2 patent drawing
  • US8732434B2 patent drawing
  • US8732434B2 patent drawing

AI summary

A memory device includes a hash table storing a hash value, a bit value, and a page address for each of a plurality of pages, a memory cell unit configured to store the pages and output contents corresponding to the page addresses of the pages having a same hash value, and a controller including a comparator configured to compare the contents output from the memory cell unit and change at least one bit value associated with a respective one of the pages upon determining that the contents of the pages are the same.