Memory Device Dynamic Memory Area Selection
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Solution Overview
Problem
Existing memory devices face challenges in efficiently managing data storage and address changes, particularly in responding to sequential command groups and changing data storage schemes without a confirm command, which can lead to inefficiencies and errors in data handling.
Innovation Solution
A memory device and method that include a memory cell array, input/output circuit, page buffer group, row decoder, column decoder, and address controller, allowing for dynamic selection of memory areas and data storage schemes based on received commands, including address and data change commands, to adaptively manage data storage and address changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a memory device uses fixed memory areas for data storage, then the structure is simple and reliable, but the adaptability to different data storage schemes is poor
Solution Approach 1:
The patent implements dynamic memory area selection by allowing the address controller to change the mapping between page buffer group numbers and memory block numbers based on received commands. The row decoder dynamically selects different memory blocks corresponding to the same page buffer group number depending on the data storage scheme, enabling the system to adapt between first and second data storage schemes without hardware reconfiguration.
Solution Approach 2:
The patent pre-configures multiple memory blocks to correspond to the same page buffer group number, preparing different memory areas in advance for different data storage schemes. When an address change command is received, the system switches between pre-prepared memory block mappings, enabling rapid adaptation without real-time computation or complex runtime decisions.
2Speed
If the memory device processes address change commands sequentially with confirm commands, then the reliability is high, but the processing speed is slow
Solution Approach 1:
The patent extracts the address change functionality from the traditional confirm command sequence by introducing a dedicated address change command. This allows the memory device to process address changes independently and immediately upon receiving the command, rather than waiting for confirm commands, thereby improving processing speed while maintaining reliability through the dedicated command structure.
Solution Approach 2:
The patent enables the memory device to skip the traditional confirm command step for address changes by processing address change commands immediately upon receipt. The system rushes through the address change operation by directly updating the row decoder mapping without waiting for confirmation, significantly reducing the time required to switch between data storage schemes.
3Productivity
If the memory device allows address changes without confirm commands, then the productivity is improved, but the risk of errors increases
Solution Approach 1:
The patent implements feedback mechanisms where the address controller monitors and tracks the current data storage scheme and memory block mappings. When an address change command is received, the system uses this feedback information to correctly update the row decoder mapping, ensuring accuracy while enabling immediate productivity improvement through confirm-less address changes.
Data Source
AI summary
Provided herein may be a memory device and a method of operating the same. The memory device may include a page buffer group configured to include a plurality of page buffers respectively coupled to a plurality of memory areas through a plurality of bit lines, a row decoder configured to select a memory area, on which an operation corresponding to a command is to be performed, from among the plurality of memory areas, based on a row address included in an address, a column decoder configured to transfer data to a page buffer of the plurality of page buffers according to a column address included in the address and an address controller configured to control the row decoder and the column decoder so that the data is stored in another memory area other than the selected memory area.