Memory Device Dynamic Write Timing Control
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Solution Overview
Problem
Existing memory devices with integrated resistance change memory elements and switching elements face challenges in accurately controlling write and read operations due to variations in the time required for the switching element to turn on, leading to potential errors and reduced processing speed.
Innovation Solution
A memory device design that includes a detection circuit to detect the on-state of the switching element, allowing for precise timing control of the write and read current supply, starting from the point of detection, ensuring consistent operation and preventing errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed timing control is used for current supply, then the control is simple, but write and read operations cannot be accurately completed due to variations in switching element turn-on time
Solution Approach 1:
The patent employs a detection circuit to monitor the actual turn-on state of the switching element and uses this feedback information to dynamically adjust the current supply timing. The control circuit receives detection signals and modifies the write/read operation timing accordingly, ensuring accurate completion despite variations in switching element characteristics. This feedback mechanism resolves the contradiction by sacrificing some control complexity to achieve reliable operation accuracy.
2Adaptability or versatility
If the current supply time is extended to accommodate slow switching elements, then all memory cells can be operated, but processing speed decreases
Solution Approach 1:
The patent implements dynamic timing adjustment where the current supply duration is not fixed but varies based on actual detection results. Fast switching elements allow shorter supply times maintaining high processing speed, while slow switching elements trigger extended timing to ensure operation completion. This dynamic approach resolves the contradiction by adapting the timing parameter to individual cell characteristics rather than using a uniform fixed time.
Solution Approach 2:
The control circuit changes the time parameter of current supply based on detected switching element states. When a switching element is detected to be slow to turn on, the control circuit extends the current supply time; when fast, it reduces the time. This parameter adjustment enables the system to accommodate variations in switching element performance while maintaining optimal processing speed, resolving the adaptability-speed contradiction.
3Measurement precision
If a detection circuit is added to monitor switching element state, then timing control accuracy improves, but device complexity increases
Solution Approach 1:
The detection circuit is designed to monitor the switching element's own state (turn-on condition) and provide feedback to the control circuit. This self-service approach allows the switching element to essentially tell the control circuit when it is ready, eliminating the need for complex external monitoring systems. The detection circuit uses the element's inherent electrical characteristics to provide timing information, achieving measurement precision with minimal added complexity.
Data Source
AI summary
According to one embodiment, a memory device includes first and second lines, a memory cell connected between the first and second lines, and including a resistance change memory element and a switching element, a current supply circuit supplying write current to the memory cell when data is written to the resistance change memory element, a detection circuit detecting an on state of the switching element after supply operation of the write current is enabled, and a control circuit controlling a time required until supplying the write current from the current supply circuit is stopped, wherein a starting point of the controlling the time is a time point at which the on state of the switching element is detected.


