Memory Device Iterative ECC Decoding for Uncorrectable Error Correction

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Solution Overview

Problem

Memory devices face reliability issues due to uncorrectable errors caused by a high number of error bits exceeding the error correction capability, leading to data distortion and designation of memory blocks as 'bad blocks'.

Innovation Solution

A memory device and system that perform randomization operations on read data and iterative ECC decoding until successful correction, allowing correction of pages with error bits exceeding the device's error correction capability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If iterative randomization and ECC decoding operations are performed, then the error correction capability is improved, but the operation time and processing complexity increase

Engineering Contradiction:
Improveerror correction capabilityVSAvoidoperation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing randomization operations on read data before ECC decoding to transform the error distribution pattern. This preliminary transformation enables the ECC decoder to correct errors that would otherwise be uncorrectable, thereby improving reliability while managing the time cost through controlled iteration

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements periodic action by repeating the randomization and ECC decoding process multiple times with different randomization seeds until successful error correction is achieved. This iterative approach systematically improves the probability of correcting difficult error patterns while maintaining bounded operation time through maximum iteration limits

Inventive Principle:
Principle #19Periodic action

2Reliability

If iterative randomization and ECC decoding operations are performed, then the error correction capability is improved, but the processing complexity increases

Engineering Contradiction:
Improveerror correction capabilityVSAvoidprocessing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the error correction process into distinct modular stages: randomization operation, ECC decoding, and result validation. Each stage is independently implemented and can be selectively executed, allowing complex error correction to be broken down into manageable processing steps that reduce overall system complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary randomization operation between the read data and ECC decoding process. This intermediary transformation layer converts difficult error patterns into more correctable forms, enabling the ECC decoder to function more effectively without requiring fundamentally more complex decoding algorithms

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9703628B2Memory device and system including the same
Publication Date: 2017.07.11 MIMIRIP LLC
  • US9703628B2 patent drawing
  • US9703628B2 patent drawing
  • US9703628B2 patent drawing

AI summary

Disclosed is a memory device including: a plurality of memory blocks suitable for storing data; peripheral circuits suitable for temporarily storing data read from a selected memory block, performing a randomization operation to the read data, and performing an ECC decoding operation to the randomized data; and a control logic suitable for controlling the peripheral circuits to repeat the randomization operation and the ECC decoding operation until the ECC decoding operation is successful, and a system including the same.