Memory Device Selective ECC Storage

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Solution Overview

Problem

Conventional memory devices require significant memory space to store error correction codes for phase-change memories, limiting the miniaturization of these devices due to the need for a corresponding ECC for each data set.

Innovation Solution

A memory device and operation method where the decision to write an error correction code into a second memory array is based on the verification result of the original data in a first memory array, allowing for reduced storage of error correction codes by only writing them when necessary.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction codes are stored for each data in phase-change memories, then data accuracy is ensured, but memory space requirement increases significantly

Engineering Contradiction:
Improvedata accuracyVSAvoidmemory space
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies local quality by differentiating the storage requirement based on the programming result of each data. Instead of uniformly storing ECC for all data, the system stores ECC only for data that fails programming verification, thereby reducing overall memory space while maintaining reliability where needed.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the parameter of ECC storage from a fixed requirement to a conditional one based on programming verification results. The system dynamically determines whether to store ECC based on the verification outcome, transforming the storage strategy from static to adaptive.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If error correction codes are stored for each data, then data accuracy is ensured, but device miniaturization is limited

Engineering Contradiction:
Improvedata accuracyVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The patent reduces device volume by implementing selective ECC storage. Only data that fails programming verification has its ECC stored, which significantly reduces the total memory space required for ECC storage and enables better device miniaturization while maintaining data accuracy where failures occur.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the storage parameter from comprehensive to selective based on verification results. This parameter change allows the system to maintain data accuracy for problematic data while reducing overall memory consumption to facilitate device miniaturization.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If error correction codes are selectively stored based on verification results, then memory space is reduced, but the complexity of the programming operation increases

Engineering Contradiction:
Improvememory spaceVSAvoidprogramming operation complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing verification of the programming result before deciding whether to store the ECC. The verification step is performed in advance to determine the subsequent storage action, which streamlines the overall process despite the additional verification step.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses feedback from the programming verification result to control the ECC storage decision. The verification outcome feeds back into the control logic to determine whether to proceed with ECC storage, creating a closed-loop system that reduces memory space while managing complexity through intelligent control.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9507663B1Memory device and operation method
Publication Date: 2016.11.29 MACRONIX INTERNATIONAL CO LTD
  • US9507663B1 patent drawing
  • US9507663B1 patent drawing
  • US9507663B1 patent drawing

AI summary

A memory device and an operation method thereof are provided, and the operation method of the memory device includes following steps. A programming operation is performed to write an original data into a first memory array in the memory device. The original data in the first memory array is verified, and whether to generate a write signal is determined according to a verification result. An error correction code is generated according to the original data, and the error correction code and a write address are stored temporarily in a buffer circuit of the memory device. When the write signal is generated, the error correction code and the write address in the buffer circuit are written into a second memory array in the memory device.