Semiconductor Memory Device Dynamic Evaluation Time Compensation
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Solution Overview
Problem
Current semiconductor memory devices face limitations in read performance due to variations in threshold voltage distributions during program and verify operations, leading to inefficiencies in sensing operations and evaluation times.
Innovation Solution
The semiconductor memory device employs a control logic to perform single-level cell program operations, compare fail bits from normal and multi-sensing operations, and adjust evaluation times for read operations based on the comparison results, optimizing read performance by compensating for differences in reference current and source line noise effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a normal sensing operation is performed with a single voltage, then the operation speed is fast, but the sensing accuracy is insufficient due to threshold voltage variations
Solution Approach 1:
The sensing operation is divided into multiple discrete voltage levels (first voltage, second voltage, third voltage) instead of using a single voltage. This segmentation allows the system to sample threshold voltage distributions at different points, improving measurement accuracy while maintaining operational efficiency through systematic multi-voltage sampling.
Solution Approach 2:
The sensing operation changes the voltage parameter across multiple discrete levels to capture threshold voltage distribution variations. By performing sensing operations at different voltage levels (first voltage for initial sensing, second voltage for intermediate sensing, third voltage for final sensing), the system accurately determines program state transitions despite threshold voltage variations.
2Measurement precision
If multiple sensing operations are performed to improve accuracy, then the sensing precision improves, but the operation time increases
Solution Approach 1:
The first sensing operation using the first voltage is performed as a preliminary action to determine initial program state transitions. This preliminary sensing identifies which memory cells have transitioned to the programmed state, allowing subsequent sensing operations to focus resources efficiently and reduce overall operation time while maintaining accuracy.
Solution Approach 2:
Multiple sensing operations are performed periodically at different voltage levels (first voltage, second voltage, third voltage) during the program operation. This periodic multi-voltage sensing approach ensures accurate detection of program state transitions while managing operation time through structured, time-efficient sampling intervals.
3Productivity
If evaluation time is fixed for all program states, then the control logic is simple, but the read performance varies due to threshold voltage distribution differences
Solution Approach 1:
The evaluation time is made dynamic and adaptive rather than fixed. The control logic determines program state transitions at different evaluation times based on results from multi-voltage sensing operations. This dynamic adjustment of evaluation timing optimizes read performance for different program states while the control logic adapts to threshold voltage distribution variations through feedback from the sensing operations.
Data Source
AI summary
A semiconductor memory device includes a memory cell array, a peripheral circuit, and a control logic. The memory cell array includes a plurality of memory cells. The peripheral circuit is configured to perform a program operation and a read operation on the memory cell array. The control logic is configured to control an operation of the peripheral circuit. The control logic controls the peripheral circuit to perform an SLC program operation on memory cells included in a selected page among the plurality of memory cells, compares the number of first fail bits counted by performing a normal sensing operation on the selected page and the number of second fail bits counted by performing a multi-sensing operation on the selected page, and corrects at least one evaluation time to be used for a read operation based on a result of the comparison.