Memory Device GIDL Erase Voltage Control
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Solution Overview
Problem
Existing nonvolatile memory devices, such as flash memory, have relatively low write and read speeds and inefficient erase operations, which hinder their performance in storing data that needs to be retained without power supply.
Innovation Solution
The proposed memory device incorporates a memory block with peripheral circuits capable of performing an erase operation using a gate-induced drain leakage (GIDL) current generation operation, where a negative voltage is applied to the word lines during the GIDL current generation, and distinct erase voltages are applied during different periods of the erase operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional erase operations are used in nonvolatile memory devices, then data retention is maintained, but erase efficiency is low
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting voltage levels during the erase operation. Specifically, a first voltage is applied during a first period and a second voltage (different from the first) is applied during a second period. This voltage parameter modification enables efficient GIDL current generation while maintaining data retention characteristics, resolving the contradiction between erase efficiency and data retention reliability.
2Speed
If write and read operations are performed in nonvolatile memory devices, then data storage is achieved, but speeds are relatively low
Solution Approach 1:
The patent implements preliminary action through the GIDL current generation operation performed before the main data erase operation. By pre-establishing the necessary current conditions and voltage states during the first period, the subsequent data erase operation in the second period can proceed more efficiently and rapidly, thereby improving overall write and read speeds without compromising data retention.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the erase efficiency of the memory device by rapidly increasing the channel potential during the GIDL current generation operation, thereby improving the overall performance of the memory device in data retention and retrieval.
Implementation Method 1
peripheral circuits configured to perform an erase operation including a gate induced drain leakage (GIDL) current generation operation and a data erase operation using an GIDL current on the memory block
Data Source
AI summary
A memory device and a method of operating the same are provided. The memory device may include a memory block including a plurality of memory cells, peripheral circuits configured to perform an erase operation including a gate induced drain leakage (GIDL) current generation operation and a data erase operation using an GIDL current on the memory block, and control logic configured to control the peripheral circuits to perform the erase operation, wherein the control logic is configured to control the peripheral circuits to apply a negative voltage to word lines of the memory block during the GIDL current generation operation.