Memory Device HRR Tables for Proactive Read Threshold Adaptation

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Solution Overview

Problem

Existing flash memory systems face challenges in maintaining high Quality-of-Service (QoS) due to reactive read threshold adaptations that cause multiple read retries, leading to increased latency and power consumption.

Innovation Solution

Implementing an in-memory History Read Retry (HRR) table within the memory device for proactive read threshold adaptation, where test reads are performed in the background to identify the entry with the lowest failed bit count and update both the in-memory and in-controller HRR tables, minimizing first read failures and reducing the need for reactive updates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If reactive read threshold adaptation is performed by the memory controller, then data read errors can be corrected, but multiple read retries are caused leading to increased latency and power consumption

Engineering Contradiction:
Improvedata read accuracyVSAvoidread latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory device proactively performs test reads using different read threshold voltages before actual read operations to determine the optimal thresholds. By preparing the HRR table in advance with pre-tested threshold values, the system eliminates the need for multiple reactive retries during actual reads, thus reducing latency while maintaining data accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary HRR (History Read Retry) table that stores pre-determined optimal read threshold voltages. This table acts as a mediator between the memory device and memory controller, providing ready-to-use threshold values that eliminate the need for the controller to perform multiple retry attempts, thereby reducing both latency and power consumption.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If multiple read retry attempts are performed, then data read errors can be corrected, but power consumption increases

Engineering Contradiction:
Improvedata read accuracyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system performs test reads and determines optimal read threshold voltages in advance, storing them in the HRR table. This preliminary action ensures that when actual read operations occur, the correct thresholds are immediately available, eliminating the need for multiple power-consuming retry attempts and thereby reducing overall power consumption while maintaining data accuracy.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If the memory controller performs test reads to update read thresholds, then read accuracy improves, but data transfer overhead increases

Engineering Contradiction:
Improveread accuracyVSAvoiddata transfer volume
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extracts the test read functionality and HRR table management from the memory controller to the memory device itself. By performing test reads and updating the HRR table within the memory device, the system eliminates the need for extensive data transfers between the controller and device, reducing data transfer overhead while still achieving accurate read thresholds.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The memory device performs self-service by autonomously conducting test reads, determining optimal thresholds, and updating its own HRR table without requiring continuous intervention from the memory controller. This self-service approach minimizes data transfer overhead between the controller and device while maintaining high read accuracy.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12451198B2In-memory read threshold adaptation
Publication Date: 2025.10.21 SK HYNIX INC
  • US12451198B2 patent drawing
  • US12451198B2 patent drawing
  • US12451198B2 patent drawing

AI summary

A memory device of a storage device may perform a test read of the memory device for each entry of a set of entries of an in-memory history read retry (HRR) table using a set of read thresholds corresponding to that entry. The memory device may identify an entry in the set of entries having a lowest failed bit count (FBC) obtained from the test read of each entry, and update the in-memory HRR table to have the identified entry with the lowest FBC be at a beginning of the in-memory HRR table. The memory device may also notify a memory controller coupled to the memory device to update an in-controller HRR table stored in the memory controller based on the update to the in-memory HRR table.