Memory Device In-Memory MAC Operations
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Solution Overview
Problem
The memory wall problem in large-scale datasets arises due to the significant speed difference between processors and memory, leading to performance limitations, especially when processing large datasets.
Innovation Solution
A computational method for a memory device that involves storing weight data in memory cells, generating memory cell currents based on input data and weight data, summing these currents on bit lines, converting them into analog-to-digital conversion results, and accumulating these results to obtain a computational outcome.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional processor-memory architecture is used, then memory access speed is limited by the memory wall problem, but processor performance is bottlenecked by data retrieval speed
Solution Approach 1:
The patent merges computing operations with memory storage by implementing in-memory MAC operations. The memory device performs both storage and computational functions within the same hardware structure, eliminating the need for data to be transferred between processor and memory. This integration directly addresses the memory wall problem by making the memory system computationally capable, thereby reducing processor stall time and improving overall data retrieval speed.
2Productivity
If MAC operations are performed using traditional processor architecture, then computational accuracy is maintained, but energy consumption increases and computational efficiency decreases
Solution Approach 1:
The patent replaces traditional digital processor-based MAC operations with analog computational mechanisms implemented in memory. Instead of using digital logic gates and arithmetic units in the processor, the system uses analog current-based multiplication and accumulation directly in the memory array. This substitution significantly reduces energy consumption while maintaining computational efficiency, as the analog operations eliminate the need for repeated digital processing cycles.
3Productivity
If data is stored in traditional memory architecture, then storage capacity is achieved, but computational operations become inefficient due to data transfer limitations
Solution Approach 1:
The patent implements multi-functionality by enabling the memory device to perform both data storage and computational operations simultaneously. The same memory array that stores weight data also performs MAC operations with input data, eliminating the need for separate computational hardware. This universal approach improves computational efficiency by keeping data and computations together, while the standardized memory cell structure keeps the architecture relatively simple despite the enhanced functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances computational efficiency and reduces energy consumption by effectively performing Multiply Accumulate (MAC) operations within the memory device, thereby alleviating the memory wall problem.
Implementation Method 1
generating a plurality of memory cell currents in the plurality of first memory cells based on the weight data and the input data
Implementation Method 2
converting the summed currents into a plurality of analog-to-digital conversion results
Data Source
AI summary
The application discloses a memory device and a computation method thereof. A plurality of weight data are stored in a plurality of first memory cells of the memory device. A plurality of input data are input via a plurality of string select lines. A plurality of memory cell currents are generated in the plurality of first memory cells based on the weight data and the input data. The memory cell currents are summed on a plurality of bit lines coupled to the plurality of string select lines to obtain a plurality of summed currents. The summed currents are converted into a plurality of analog-to-digital conversion results. The plurality of analog-to-digital conversion results are accumulated to obtain a computational result.