Semiconductor Memory Device With Layered Block Insulator
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Solution Overview
Problem
NAND-type flash memory devices face challenges in reducing coupling capacitance between adjacent word lines, which can lead to increased charging times and deterioration of electric characteristics, especially when using high dielectric constant materials for block insulating films.
Innovation Solution
The semiconductor memory device employs a layered structure where a high dielectric constant block insulating film is used only at the periphery adjacent to conductive layers, while a low dielectric constant film is used adjacent to insulating layers, effectively reducing coupling capacitance and maintaining leakage current suppression.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high dielectric constant block insulating film is used to suppress leakage current, then leakage current suppression is improved, but coupling capacitance between adjacent word lines increases
Solution Approach 1:
The patent applies different dielectric constant characteristics to different regions of the block insulating film. Specifically, the first block insulating film (34) adjacent to the insulating layer (41) has a lower dielectric constant to reduce coupling capacitance, while the second block insulating film (36) adjacent to the conductive layer (23) has a higher dielectric constant to suppress leakage current. This spatial differentiation of material properties resolves the contradiction between leakage suppression and capacitance reduction.
Solution Approach 2:
The patent employs a composite block insulating film structure consisting of two distinct insulating films with different dielectric constants. The first block insulating film (34) and second block insulating film (36) are formed as separate layers with different electrical characteristics, creating a composite structure that simultaneously achieves low coupling capacitance and high leakage current suppression by optimizing each layer's function.
2Loss of time
If coupling capacitance between adjacent word lines is reduced, then charging time is decreased, but leakage current suppression may be compromised
Solution Approach 1:
The patent implements spatially differentiated dielectric constants within the block insulating film structure. The first block insulating film (34) with lower dielectric constant is positioned where coupling capacitance affects charging time, while the second block insulating film (36) with higher dielectric constant is positioned where leakage current suppression is critical. This local optimization allows simultaneous improvement of both charging speed and reliability.
Solution Approach 2:
The block insulating film is segmented into two distinct functional layers: the first block insulating film (34) optimized for reducing coupling capacitance and the second block insulating film (36) optimized for suppressing leakage current. This segmentation allows each layer to independently optimize its function without compromising the other, resolving the time-reliability contradiction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration decreases coupling capacitance between adjacent word lines, improving the electric characteristics of memory cell transistors and maintaining leakage current suppression, thereby enhancing the performance of the semiconductor memory device.
Implementation Method 1
The fifth insulator is having a different dielectric constant from a dielectric constant of the fourth insulator
Implementation Method 2
decreases coupling capacitance between adjacent word lines
Implementation Method 3
maintaining leakage current suppression
Data Source
AI summary
A semiconductor memory device comprises a semiconductor, a first insulator, a second insulator, a first conductor, a third insulator, a fourth insulator, and a fifth insulator. The first insulator is on the semiconductor. The second insulator is on the first insulator. The third insulator is on the first conductor. The fourth insulator is between the second insulator and the first conductor. The fifth insulator is provided between the second insulator and the third insulator. The fifth insulator is having an oxygen concentration different from an oxygen concentration of the fourth insulator.