Memory Device Data Migration via Dedicated Interface

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Solution Overview

Problem

Existing memory systems experience performance degradation during data migration operations due to the need to transfer data over channels between the memory system and the host device, which can reduce bandwidth and increase latency.

Innovation Solution

A memory device is configured with an additional interface and buffers to facilitate opportunistic data migration operations, allowing data to be transferred between banks of memory cells during access periods without disrupting foreground operations, using a two-tier memory system with volatile and non-volatile memory technologies to improve overall bandwidth and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data migration operations are performed using existing memory systems, then data can be transferred between memory locations, but bandwidth is reduced and latency increases due to channel transfers between memory system and host device

Engineering Contradiction:
Improvedata migration throughputVSAvoidmigration latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent extracts the data migration function from the host device and places it directly in the memory device. The memory device includes a data migration controller that can perform migration operations locally without requiring host device intervention, thereby eliminating channel transfer overhead and reducing latency.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a data migration controller as an intermediary component within the memory device. This controller manages data migration operations between different memory banks or modules, enabling efficient local data movement without involving the host device or external channels.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If data migration operations are performed over channels between memory system and host device, then data can be migrated, but bandwidth is reduced due to channel contention

Engineering Contradiction:
Improvememory bandwidthVSAvoiddata transfer capacity
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent extracts the data migration function from the host device and places it directly in the memory device. The memory device includes a data migration controller that can perform migration operations locally without requiring host device intervention, thereby eliminating channel transfer overhead and reducing latency.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a new dimension for data transfer by enabling direct intra-memory-device data movement. Instead of transferring data through the host device (external dimension), the migration controller enables direct transfers between memory banks (internal dimension), effectively adding a parallel data path that does not contend for external channel bandwidth.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If traditional memory systems are used for data migration, then existing infrastructure can be utilized, but performance degradation occurs due to disrupted foreground operations

Engineering Contradiction:
Improvememory access efficiencyVSAvoidforeground operation performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the memory device into multiple independent banks or modules, each capable of operating independently. The data migration controller can perform migration operations on one bank without affecting foreground operations on other banks, thereby maintaining overall system performance and preventing disruption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent enables continuous useful action by allowing foreground operations and data migration operations to proceed simultaneously and independently in different memory banks. The migration controller manages these operations without interrupting or degrading the performance of foreground access operations, ensuring continuous high-performance memory access.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS11709613B2Data migration for memory operation
Publication Date: 2023.07.25 MICRON TECHNOLOGY INC
  • US11709613B2 patent drawing
  • US11709613B2 patent drawing
  • US11709613B2 patent drawing

AI summary

Apparatuses and methods for performing data migration operations are disclosed. An apparatus may include at least two interfaces, a first interface supporting data migration operations and a second interface supporting access operations associated with a host device. In some cases, the access operations may be a signal or protocol according to an industry standard or specification (e.g., a DRAM interface specification). The second interface may facilitate supporting industry standard applications, while the first interface supporting data migration operations may provide improved bandwidth for migrating data within the apparatus. The apparatus may include a buffer coupled with the interface and a bank cluster including two or more banks of memory cells. When a host device addresses a bank of the bank cluster, the apparatus may perform one or more data migration operations using the buffer and a different bank of the bank cluster.