Semiconductor Memory Device Multilevel Data Integrity

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Solution Overview

Problem

In NAND flash memory, the miniaturization of elements leads to increased influence of adjacent cell threshold voltages, causing data instability and destruction of previously written data during multivalued storage, especially when writing operations are interrupted.

Innovation Solution

A semiconductor memory device with a memory cell array and control section that manages threshold voltages through multiple write operations and flag cells to maintain data integrity by setting and verifying threshold voltages across multiple levels, preventing overlap and ensuring data retention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multivalued data is stored in a single memory cell using multiple threshold voltages, then storage capacity is improved, but threshold voltage distribution control becomes more difficult due to adjacent cell influence

Engineering Contradiction:
Improvestorage capacityVSAvoidthreshold voltage distribution control
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The write operation is segmented into multiple stages: first writing one-bit data to the memory cell, then writing to adjacent cells, and finally writing the remaining data to the original cell. This segmentation prevents threshold voltage overlap by completing intermediate write steps before proceeding to the next stage, thereby resolving the contradiction between storing multiple values and maintaining precise threshold voltage distribution.

Inventive Principle:
Principle #1Segmentation

2Productivity

If writing speed is increased by writing data directly to the memory cell, then productivity is improved, but data destruction occurs when writing is interrupted due to overlapping threshold voltage distributions

Engineering Contradiction:
Improvewriting speedVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The method performs preliminary write actions in a specific sequence: first writing to the memory cell, then to adjacent cells, and finally to the original cell again. This preliminary action structure ensures that threshold voltage distributions do not overlap, preventing data destruction even if writing is interrupted, while maintaining efficient write speed.

Inventive Principle:
Principle #10Preliminary action

3Volume of moving object

If element size is reduced for miniaturization, then device density is improved, but adjacent cell threshold voltage influence increases causing data instability

Engineering Contradiction:
Improveelement sizeVSAvoidadjacent cell threshold voltage influence
Core Design Contradiction:
Volume of moving objectVSObject-affected harmful factors

Solution Approach 1:

The write operation is divided into distinct segments that address adjacent cells separately from the target cell. By segmenting the write process into steps that complete adjacent cell writes before returning to the target cell, the method isolates the harmful adjacent cell influence and prevents it from corrupting the stored data, enabling continued miniaturization without sacrificing data stability.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7394691B2Semiconductor memory device which prevents destruction of data
Publication Date: 2008.07.01 KIOXIA CORP
  • US7394691B2 patent drawing
  • US7394691B2 patent drawing
  • US7394691B2 patent drawing

AI summary

A plurality of memory cells each storing n values (n is a natural number which is not smaller than 3) are arranged in a matrix form in a memory cell array, and each memory cell is connected with a word line and a bit line. Each memory cell stores the n-valued data by a first write operation and a second write operation. A read section sets a potential of a word line, and reads data from a memory cell in the memory cell array. If data read by the read section and written in the second write operation includes an uncorrectable error, a control section changes a potential of a word line supplied to the read section when reading data written in the first write operation.