Memory Device Program Verify Negative Voltage Detrapping
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Solution Overview
Problem
Memory devices experience quick charge loss during program verify operations due to electrons trapped in the tunnel oxide layer, leading to data retention defects and increased read error rates, as existing methods fail to separate detrapping from the tunnel oxide layer and channel region effectively.
Innovation Solution
Applying a negative voltage signal to the selected word line during the program verify phase to detrapping electrons from the tunnel oxide layer while preventing detrapping in the channel region, thereby reducing quick charge loss and enhancing data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a negative voltage signal is applied to the selected word line during program verify phase to detrapping electrons from tunnel oxide layer, then quick charge loss is reduced and data retention is improved, but device complexity increases due to additional voltage control mechanisms
Solution Approach 1:
The negative voltage signal is applied to the selected word line during the program verify phase, before the actual verify operation completes. This preliminary detrapping action removes trapped electrons from the tunnel oxide layer prior to reading, preventing quick charge loss during the verify operation and improving data retention reliability.
Solution Approach 2:
The patent changes the voltage parameter by applying a negative voltage signal to the selected word line during the program verify phase. This parameter change enables selective detrapping of electrons from the tunnel oxide layer while maintaining control over the channel region, thereby improving data retention without requiring complete system redesign.
2Reliability
If electrons are detrapped from the tunnel oxide layer during program verify, then read error rates are reduced, but detrapping in the channel region may occur leading to threshold voltage shifts
Solution Approach 1:
The patent applies local quality by targeting the detrapping process specifically at the tunnel oxide layer through selective negative voltage application to the selected word line during program verify. This localized approach ensures that electrons are removed from the tunnel oxide layer (reducing read errors) while the channel region remains unaffected (maintaining threshold voltage stability).
Solution Approach 2:
The negative voltage signal acts as an intermediary mechanism that selectively interacts with the tunnel oxide layer to remove trapped electrons. This intermediary approach allows the system to address the read error issue without directly affecting the channel region, thereby maintaining threshold voltage stability while reducing read error rates.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the read window budget, lowers error rates, and improves data retention by separating the detrapping processes in time, resulting in improved performance and reliability of the memory sub-system.
Implementation Method 1
Applying a negative voltage signal to the selected word line during the program verify phase to detrapping electrons from the tunnel oxide layer
Data Source
AI summary
Processing logic in a memory device initiates a program operation on a memory array, the program operation comprising a program phase and a program verify phase. The processing logic further causes a negative voltage signal to be applied to a first selected word line of a block of the memory array during the program verify phase of the program operation, wherein the first selected word line is coupled to a corresponding first memory cell of a first plurality of memory cells in a string of memory cells in the block, wherein the first selected word line is associated with the program operation.