Memory Device Operation Method for Tightening Cell Current Distribution
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Solution Overview
Problem
Current computing in memory (CIM) systems face challenges in tightening current distribution for multi-level cell (MLC) storage, which affects the recognition accuracy of deep neural networks (DNNs), leading to inefficiencies in power consumption and data movement.
Innovation Solution
An operation method for a memory device involving a two-stage programming process, where the memory gate voltage is increased to decrease the cell current in the first stage, and the drain voltage is increased in the second stage to achieve a target cell current threshold, thereby tightening the cell current distribution and improving accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-bit data storage is developed to increase CIM capacity, then storage density is improved, but current distribution tightens making it difficult to achieve sufficient recognition accuracy
Solution Approach 1:
The programming operation is segmented into two distinct stages: a first programming stage that performs initial programming and a second programming stage that performs fine-tuning. This segmentation allows the system to first establish basic data storage and then progressively tighten the current distribution through additional programming passes, resolving the contradiction between achieving high storage density and maintaining precise current distribution for MLCs.
Solution Approach 2:
The first programming stage performs preliminary programming to establish initial data storage in the memory cells. This preliminary action creates a foundation that enables subsequent fine-tuning in the second programming stage, where the current distribution is tightened through additional programming operations. This preliminary action approach allows the system to achieve both high CIM capacity and precise current distribution.
2Productivity
If conventional programming is used for MLCs, then programming speed is maintained, but current distribution remains loose affecting DNN recognition accuracy
Solution Approach 1:
The programming process is divided into a first programming stage for initial data storage and a second programming stage for fine-tuning current distribution. This segmentation enables the system to maintain overall programming efficiency while achieving the precise current distribution necessary for high-accuracy DNN recognition in MLC configurations.
Solution Approach 2:
The first programming stage performs preliminary programming to establish initial data storage quickly. This preliminary action allows the system to maintain high programming speed while setting up the foundation for subsequent fine-tuning operations that will tighten the current distribution and improve recognition accuracy.
3Loss of energy
If data movement is reduced for CIM, then power consumption decreases, but current distribution tightening becomes more challenging
Solution Approach 1:
The two-stage programming approach segments the programming operations into initial programming and fine-tuning stages. This segmentation enables the system to achieve precise current distribution tightening through targeted second-stage programming, which reduces the need for repeated read-verify-program cycles and thereby lowers overall power consumption while maintaining high precision for MLCs.
Solution Approach 2:
The programming process incorporates verify-read operations between programming stages to check whether the current distribution has been sufficiently tightened. This feedback mechanism allows the system to efficiently determine when the second programming stage should terminate, avoiding unnecessary programming cycles and reducing power consumption while ensuring the required current distribution precision is achieved.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method results in a narrower cell current distribution and significantly enhances the accuracy of artificial intelligence applications, improving from 70% to 90% AI accuracy by adjusting the select gate voltage to operate memory cells in the saturation region, reducing power consumption and data movement.
Implementation Method 1
performing a verify-read operation on a memory cell to generate a cell current, the memory cell including a first transistor and a second transistor
Implementation Method 2
checking whether the cell current is lower than a first cell current threshold; when the cell current is not lower than the first cell current threshold, increasing a memory gate voltage until the cell current is lower than the first cell current threshold, wherein the memory gate voltage is applied to the first transistor
Data Source
AI summary
Provided is an operation method for a memory device, the operation method comprising: performing an erase operation; performing a verify-read operation on a memory cell to generate a cell current, the memory cell including a first transistor and a second transistor; checking whether the cell current is lower than a first cell current threshold; when the cell current is not lower than the first cell current threshold, increasing a memory gate voltage until the cell current is lower than the first cell current threshold, wherein the memory gate voltage is applied to the first transistor; fixing the memory gate voltage and increasing a drain voltage; checking whether the cell current is lower than a second cell current threshold; and if the cell current is not lower than the second cell current threshold, increasing the drain voltage until the cell current is lower than the second cell current threshold.