Semiconductor Memory Device Peripheral Circuit Voltage Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor memory devices experience a disturbance phenomenon during read and program verify operations, leading to deterioration in the distribution of threshold voltages, especially when performing single page operations.
Innovation Solution
Applying first and second pass voltages to adjacent word lines during program verify and read operations, with the first pass voltage being lower than the second pass voltage, helps prevent this disturbance and improves the distribution of threshold voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a single page operation is performed in semiconductor memory devices, then operation speed is improved, but disturbance phenomenon occurs leading to deterioration in threshold voltage distribution
Solution Approach 1:
The patent applies different pass voltages to different word lines based on their position relative to the selected word line. Specifically, a first pass voltage is applied to a first adjacent word line and a second pass voltage is applied to a second adjacent word line, creating localized voltage conditions that prevent disturbance while enabling single page operation speed.
2Reliability
If pass voltage is applied to adjacent word lines during read operation, then disturbance phenomenon is prevented, but device complexity increases due to additional voltage control
Solution Approach 1:
The patent segments the word lines into different groups based on their position relative to the selected word line. The first adjacent word line receives a first pass voltage while the second adjacent word line receives a second pass voltage, allowing differentiated control that prevents disturbance without requiring complex global control mechanisms.
Data Source
AI summary
A semiconductor memory device includes a memory cell array including a plurality of pages; a peripheral circuit suitable for performing a program operation and a read operation on the memory cell array; and a control logic suitable for controlling the peripheral circuit to apply first and second pass voltages respectively to first and second word lines adjacent to a selected word line during a program verify operation or the read operation.