Memory Device Conductive Pillars Penetrating Stacked Film
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Solution Overview
Problem
The development of large-capacity nonvolatile memory devices faces challenges in achieving low-cost manufacturing due to complex structures requiring wiring below the memory cell, which complicates low voltage/low current operation and miniaturization.
Innovation Solution
A memory device structure with a stacked film of semiconductor and insulating films, where first and second conductive pillars connect memory cells to electrodes above the stacked film, eliminating the need for wiring below the film, and using a peripheral circuit board with transistors above the electrodes to simplify manufacturing and reduce costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wiring is disposed below the memory cell to connect memory cell and peripheral circuit, then electrical connection is achieved, but structure becomes complex and manufacturing cost increases
Solution Approach 1:
Instead of placing wiring below the memory cell as in conventional structures, this patent inverts the approach by placing the peripheral circuit below the memory cell and using conductive pillars that extend through the stacked film to connect above the memory cell to the peripheral circuit. This inversion simplifies the overall structure while maintaining electrical connectivity.
Solution Approach 2:
The patent transitions from planar wiring connections to vertical three-dimensional connections using conductive pillars that penetrate through the stacked film. This dimensional change from 2D to 3D connectivity reduces structural complexity and enables more efficient space utilization.
2Reliability
If conventional wiring structure is used below memory cell, then electrical connection is established, but manufacturing cost increases
Solution Approach 1:
By inverting the conventional architecture to place the peripheral circuit below the memory cell and using upward-extending conductive pillars, the patent simplifies the manufacturing process and reduces costs while maintaining reliable electrical connections.
3Reliability
If wiring below memory cell is used for connection, then electrical connectivity is achieved, but miniaturization and high integration become difficult
Solution Approach 1:
The patent achieves miniaturization and high integration by transitioning to vertical three-dimensional connections using conductive pillars that penetrate the stacked film. This approach reduces the horizontal space required for wiring, enabling smaller device footprints and higher integration densities.
Data Source
AI summary
A memory device according to an embodiment includes: a stacked film having a plurality of semiconductor films, and a plurality of insulating films each provided between the semiconductor films; a first electrode provided above the stacked film; a second electrode provided above the stacked film; a plurality of first conductive pillars penetrating through the stacked film and having one end electrically connected to the first electrode and another end not connected and positioned below the stacked film; a plurality of memory cells each provided between each of the first conductive pillars and each of the semiconductor films; a plurality of second conductive pillars electrically connected to each of the semiconductor films and the second electrode; a peripheral circuit board provided above the first electrode and the second electrode; a third electrode provided between the first electrode and the peripheral circuit board, the third electrode electrically connected to the first electrode; a fourth electrode provided between the second electrode and the peripheral circuit board, the fourth electrode electrically connected to the second electrode; and a transistor electrically connected to the third electrode or the fourth electrode, the transistor provided in the peripheral circuit board.