Memory Device Program Loop Control for Verify Operation Timing
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Solution Overview
Problem
In memory devices, the blind verify operation can lead to abnormal phenomena where program voltages are successively applied due to skipped verify operations, affecting the program operation performance.
Innovation Solution
A memory device with a program operation controller that controls the peripheral circuit to perform verify operations for different program states from specific program loops, ensuring that the verify operation for a second program state with a higher threshold voltage is done only after the first program state has passed, and adjusting the program loop based on the verify operation results.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a blind verify operation is performed where verify operations are skipped for specific program states, then the program operation speed is improved, but abnormal phenomena occur where program voltages are successively applied
Solution Approach 1:
The patent implements a feedback mechanism where the program operation controller monitors the result of each verify operation and uses this information to determine whether to perform subsequent verify operations. When a verify operation passes, the controller skips the verify operation for the next program state; when it fails, the controller performs the verify operation for the next program state. This feedback-based control prevents abnormal successive voltage application while maintaining efficient program operation.
2Reliability
If verify operations are performed for all program states in sequence, then program voltage application reliability is maintained, but program operation time increases
Solution Approach 1:
The patent applies a dynamic approach to verify operations by making the controller adaptable based on real-time results. The controller dynamically adjusts its behavior: skipping verify operations when previous checks pass (optimizing time) and executing them when checks fail (maintaining reliability). This dynamic control strategy allows the system to optimize program operation time while ensuring reliability only when necessary.
Data Source
AI summary
A memory device, and a method of operating the same, includes a plurality of memory cells configured to be programmed to any one of a plurality of program states, a peripheral circuit configured to perform a plurality of program loops on the plurality of memory cells, and a program operation controller. The program operation controller is configured to control the peripheral circuit such that a verify operation for a second program state is performed from a second program loop after a verify operation for a first program state performed from a first program loop passes, wherein the first program loop is performed before the second program loop.