Memory Device Program Verify Channel Voltage Boost

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Solution Overview

Problem

Current memory devices face inefficiencies in program verify operations due to unoptimized channel voltage management across cell strings, leading to prolonged verification times and potential data loss during the process.

Innovation Solution

The memory device incorporates a control logic that boosts the channel voltage of unselected cell strings based on the progress of the program operation compared to a reference degree, optimizing voltage levels to reduce verification time and prevent data loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If channel voltage of unselected cell strings is maintained at normal level during program verify operation, then device complexity is reduced, but verification time increases and data loss risk increases

Engineering Contradiction:
Improveverification timeVSAvoidvoltage control complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The control logic performs preliminary action by boosting the channel voltage of unselected cell strings before the program verify operation completes. This preliminary voltage adjustment ensures that when verification occurs, the channel voltage is already optimized to reduce verification time and prevent data loss, without requiring complex real-time voltage modulation during the verification process itself.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements dynamic voltage control by adjusting the channel voltage of unselected cell strings based on the progress of the program operation. The control logic dynamically boosts the voltage when the program operation reaches a certain progress threshold, allowing the system to adapt voltage levels to operational needs and reduce verification time while maintaining manageable complexity through threshold-based decision making.

Inventive Principle:
Principle #15Dynamics

2Reliability

If channel voltage of unselected cell strings is boosted during program verify operation, then verification performance improves and data loss is prevented, but energy consumption increases

Engineering Contradiction:
Improvedata loss preventionVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system applies parameter changes by modifying the channel voltage level of unselected cell strings from normal operating voltage to a boosted voltage level. This parameter adjustment ensures data integrity and prevents data loss during program verify operations by maintaining adequate voltage margins, while the control logic manages energy consumption by applying voltage boosts only when necessary based on program operation progress.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If channel voltage of unselected cell strings is boosted based on program progress, then verification time is reduced, but control logic complexity increases

Engineering Contradiction:
Improveverification speedVSAvoidcontrol logic complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The control logic implements feedback by monitoring the progress of the program operation and using this information to determine when to boost the channel voltage of unselected cell strings. This feedback mechanism allows the system to optimize verification speed by adjusting voltage levels based on actual operational progress, while managing control logic complexity through straightforward threshold-based feedback control rather than complex real-time optimization algorithms.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11335406B2Memory device for performing program verify operation and method of operating the same
Publication Date: 2022.05.17 SK HYNIX INC
  • US11335406B2 patent drawing
  • US11335406B2 patent drawing
  • US11335406B2 patent drawing

AI summary

Provided herein may be a memory device and a method of operating the same. The memory device may include a plurality of cell strings, a peripheral circuit, and control logic. Each of the cell strings includes a drain select transistor, a source select transistor, and a plurality of memory cells that are coupled in series between the drain select transistor and the source select transistor. The peripheral circuit may be configured to perform a program operation and a program verify operation on a cell string that is selected from among the plurality of cell strings. The control logic may be configured to control the peripheral circuit to boost a channel voltage of at least one unselected cell string, among the plurality of cell strings, based on a comparison between a degree of progress of the program operation and a reference degree of progress during the program verify operation.