Semiconductor Memory Device Multi-Step Program Voltage Control
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Solution Overview
Problem
Semiconductor memory devices, particularly flash memories, exhibit varying program speeds among memory cells due to differences in threshold voltage distributions, leading to inefficiencies in programming operations.
Innovation Solution
A semiconductor memory device and operating method that control program speeds by applying a program voltage increased in multiple steps to a selected word line and sequentially adjusting initial setting and pass voltages to adjacent word lines, ensuring equal programming speeds across memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If a single program voltage is applied to all memory cells, then the program operation is simple, but the program speeds of different memory cells become unequal due to threshold voltage distribution variations
Solution Approach 1:
The patent applies different program voltages to different word lines based on their threshold voltage characteristics. Fast cells receive a first program voltage while slow cells receive a second program voltage that is higher than the first, allowing both fast and slow cells to achieve uniform threshold voltage shifts and equal program speeds.
Solution Approach 2:
The patent divides the memory cell array into different groups (fast cells and slow cells) and applies different program voltages to each group. This local differentiation allows each group to be programmed at its optimal voltage level, achieving uniform program speeds across all memory cells while maintaining operational simplicity through automated voltage selection.
2Productivity
If program voltage is increased to speed up programming, then programming efficiency improves, but threshold voltage distribution width increases due to variations in cell response
Solution Approach 1:
The patent uses multiple program voltage levels (first program voltage for fast cells, second program voltage higher than the first for slow cells) to maintain efficient programming while achieving uniform threshold voltage distribution. This prevents the distribution width from increasing by tailoring the voltage to each cell group's characteristics.
Solution Approach 2:
The patent implements a feedback mechanism where the control logic determines whether to apply the first or second program voltage based on the threshold voltage distribution characteristics of the memory cells. This feedback control ensures that the threshold voltage distribution width is maintained within a target range while achieving efficient programming.
3Manufacturing precision
If different program voltages are applied to different memory cells, then program speed uniformity improves, but control complexity increases
Solution Approach 1:
The patent manages control complexity by using a systematic approach to voltage selection. The control logic determines whether to apply the first or second program voltage based on simple criteria (fast vs. slow cell identification), avoiding overly complex control mechanisms while achieving uniform program speeds across all memory cells.
Data Source
AI summary
There are provided a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of memory strings, a peripheral circuit for performing a program operation on the plurality of memory strings, and a control logic for controlling the peripheral circuit to apply a program voltage increased by at least two steps to a selected word line among a plurality of word lines connected to the plurality of memory strings and sequentially apply an initial setting voltage and a pass voltage to word lines adjacent to the selected word line, wherein the initial setting voltage is decreased as the program voltage is increased.