Memory Device Reference Voltage Circuit for Signal Stability

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Solution Overview

Problem

Existing storage devices face challenges in reliable data transfer due to voltage fluctuations caused by parasitic resistance, leading to signal distortion and timing issues during data sampling.

Innovation Solution

A storage device configuration that includes a memory device with a circuit to generate a reference voltage (VREFC) for signal transmission, which is used by the memory controller to determine signal levels, thereby stabilizing signal sampling and reducing distortion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is transferred at high speed between memory device and memory controller, then productivity is improved, but signal distortion and timing errors increase due to parasitic resistance

Engineering Contradiction:

Improvedata transfer speedVSAvoidsignal sampling accuracy

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

A reference voltage terminal is provided in the memory device to output a reference voltage that serves as a mediator for the memory controller's input buffer. This reference voltage compensates for voltage drops caused by parasitic resistance during high-speed data transfer, enabling accurate signal level determination without sacrificing transfer speed.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Device complexity

If reference voltage is generated internally in memory controller, then device complexity is reduced, but signal distortion increases due to voltage drops from parasitic resistance

Engineering Contradiction:

Improvevoltage generation circuitVSAvoidsignal distortion

Core Design Contradiction:

Device complexityVSObject-affected harmful factors

Solution Approach 1:

The reference voltage generation function is extracted from the memory controller and relocated to the memory device. The memory device now includes a reference voltage generation circuit that outputs the reference voltage through a dedicated terminal, eliminating the need for complex internal voltage generation in the memory controller while preventing signal distortion.

Inventive Principle:

Principle #2Taking out (Extraction)

3Reliability

If data transfer margin is increased to improve reliability, then signal sampling accuracy is improved, but data transfer speed decreases

Engineering Contradiction:

Improvedata transfer reliabilityVSAvoiddata transfer speed

Core Design Contradiction:

ReliabilityVSSpeed

Solution Approach 1:

The reference voltage level is adjusted to compensate for voltage drops caused by parasitic resistance. By changing the reference voltage parameter to match the actual signal level at the input buffer, the system maintains adequate timing margins for reliable sampling while supporting high-speed data transfer operations.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS9653125B2Storage device, memory device and semiconductor device for improving data transfer speeds

Publication Date: 2017.05.16 KIOXIA CORP

AI summary

According to one embodiment, a storage device includes a memory device including a memory cell configured to hold data, an output buffer configured to output the data, and a circuit configured to generate a reference voltage; and a controller device including an input buffer. The data from the output buffer is input into one input terminal of the input buffer and the reference voltage from the circuit is input into the other input terminal of the input buffer.