Semiconductor Memory Device RTN Compensation via Repeated Read Operations
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Solution Overview
Problem
The random telegraph noise (RTN) phenomenon in NAND flash memory devices causes variations in threshold voltages of memory cells, making it difficult to narrow the distribution of threshold voltages, especially as semiconductor memory devices become more integrated and smaller.
Innovation Solution
A semiconductor memory device and method that involves a page buffer to store read data, a counter circuit to count data during repeated read operations, and control logic to determine the data based on the counted number, thereby compensating for RTN by repeatedly reading data from a memory cell using a set number of read operations and determining the mean value as the data stored.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If repeated read operations are performed to compensate for RTN, then the distribution width of threshold voltages is narrowed, but the read operation time is increased
Solution Approach 1:
The patent applies partial action by performing a limited number of repeated read operations (e.g., 3-5 times) rather than exhaustive measurements. This partial repetition is sufficient to narrow the threshold voltage distribution width while avoiding excessive time consumption. The counter circuit counts the number of times a specific read result occurs, and when the count reaches a predetermined threshold, the reading operation stops, achieving a balance between precision and time efficiency.
Solution Approach 2:
The patent implements feedback through the counter circuit that monitors the frequency of specific read results across multiple operations. The control logic uses this feedback information to determine when to stop reading - when the counted frequency of a particular read result reaches a predetermined value, indicating sufficient statistical significance has been achieved to compensate for RTN effects.
2Reliability
If the number of read operations is increased to narrow threshold voltage distribution, then data reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies self-service by enabling the memory device to automatically perform repeated read operations and statistical analysis without external intervention. The counter circuit and control logic work autonomously to count read result frequencies, determine when sufficient samples have been collected, and output the final read data based on the majority vote principle, thereby improving reliability without requiring complex external testing equipment.
Solution Approach 2:
The patent changes the parameter of read operation frequency from a fixed single read to a variable number of repeated reads. The control logic dynamically adjusts the number of read operations based on the counted frequency of specific read results, stopping when the predetermined threshold is reached. This parameter change enables the system to adaptively balance between reliability improvement and complexity avoidance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively narrows the distribution of threshold voltages by compensating for RTN, reducing the width of voltage distributions and improving the reliability of data storage in highly integrated semiconductor memory devices.
Implementation Method 1
a random telegraph noise (RTN) phenomenon may occur and thus the threshold voltage of the memory cell may vary according to whether electrons are trapped in or released from the floating gate of the memory cell
Data Source
AI summary
A semiconductor memory device includes a page buffer configured to store data read from a memory cell, a counter circuit configured to count the number of first data or second data in the read data for every read operation while the read operations are repeated a set number of times, and a control logic configured to determine the number of read operations and determine the read data of the memory cell based on the counted number.