Semiconductor Memory Device Sacrificial Member Segmentation
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Solution Overview
Problem
The existing semiconductor memory devices face challenges in improving yield due to short circuits between the source line and select gate line, primarily in the penetration contact region, which is exacerbated by the removal of sacrificial members and insulating layers during the manufacturing process.
Innovation Solution
The semiconductor memory device employs a configuration where the sacrificial member in the source connection region is divided in the dividing section, preventing the removal of insulating members in the support pillar and contact, thus avoiding short circuits and enhancing manufacturing efficiency by concurrently processing holes for support pillars and contacts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If sacrificial members and insulating layers are removed during manufacturing, then manufacturing progress is achieved, but short circuits occur between source line and select gate line
Solution Approach 1:
The sacrificial member is divided into multiple sections: a first sacrificial member in the penetration contact region and a second sacrificial member in the source connection region. This segmentation allows selective removal of the first sacrificial member while preserving the second sacrificial member and its insulating layer, preventing short circuits between the source line and select gate line during manufacturing progression.
2Ease of manufacture
If insulating layers are removed to progress manufacturing, then structural updates are achieved, but structural integrity is compromised
Solution Approach 1:
The insulating layer is formed on the second sacrificial member before the removal of the first sacrificial member. This preliminary action ensures that when the first sacrificial member is removed, the insulating layer remains intact on the second sacrificial member, maintaining structural integrity and preventing short circuits in subsequent manufacturing steps.
3Productivity
If holes for support pillars and contacts are processed concurrently, then manufacturing efficiency is improved, but precision control becomes difficult
Solution Approach 1:
The insulating layer is selectively formed only in the source connection region on the second sacrificial member, while the penetration contact region lacks this insulating layer. This local quality difference enables concurrent processing of holes for support pillars and contacts with precise etching control, as the etching process responds differently to regions with and without the insulating layer, maintaining manufacturing precision while improving efficiency.
Data Source
AI summary
A semiconductor memory device according to an embodiment includes a substrate, first and second conductive layers, first and second pillars, and a first member. The first conductive layer includes a first portion, a second portion, and a third portion above the second portion. The second conductive layers are stacked above the first conductive layer. The first pillar includes a first semiconductor layer in contact with the first portion in a direction crossing the stacked direction. The second pillar is provided to penetrate the second conductive layers and the third portion in the stacked direction. The first member is provided between the first and second pillars and between the second and third portions.