Memory Device Slit Structure for Warpage Reduction
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Solution Overview
Problem
Memory devices with three-dimensional structures face challenges in preventing warpage, which can lead to defects and reduced manufacturing yields due to increased tensile stresses in the X and Y directions, affecting the integration and performance of gate lines.
Innovation Solution
The implementation of first and second slits, spaced apart in specific directions, to form connection regions that allow gate lines in the same layer to be electrically connected while reducing tensile stress, thereby mitigating warpage and improving manufacturing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are stacked in a vertical direction to achieve three-dimensional structure, then degree of integration is improved, but tensile stress increases causing warpage
Solution Approach 1:
The memory device is divided into multiple memory blocks by introducing first slits that extend in the first direction and second slits that extend in the second direction. These slits segment the continuous gate line structures into smaller sections, allowing independent stress management for each memory block while maintaining high integration through vertical stacking of memory cells.
2Reliability
If gate lines extend continuously through memory regions, then electrical connectivity is improved, but warpage increases due to tensile stress
Solution Approach 1:
Connection regions are introduced as intermediary structures between memory blocks separated by first slits. These connection regions contain gate lines that extend in the second direction, providing electrical connectivity between memory blocks while acting as stress relief zones that prevent warpage propagation across the entire device.
3Stability of the object's composition
If first slits and second slits are introduced to reduce stress, then warpage is reduced, but device complexity increases
Solution Approach 1:
The patent introduces slits extending in different directions (first direction and second direction) to create a two-dimensional stress management system. First slits extend in the first direction to segment memory blocks, while second slits extend in the second direction to provide additional stress relief paths, effectively controlling warpage through multi-directional stress distribution without excessive complexity.
Data Source
AI summary
A memory device includes: a memory cell array including a plurality of cell plugs; a first slit isolating the memory cell array into a plurality of memory regions, the first slit extending in a first direction; and second slits penetrating the plurality of memory regions, the second slits being arranged to be spaced apart from each other in a second direction intersecting the first direction. Gate lines included in each of the plurality of memory regions may be isolated from each other by the first slit. Each gate line located in the same layer among the gate lines included in each of the plurality of memory regions may extend through a first connection region between the second slits for each corresponding memory region.