Semiconductor Memory Device Source Control Voltage Adjustment
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Solution Overview
Problem
Semiconductor memory devices face challenges in accurately performing program verify operations due to variations in the potential levels of source control voltage and source line voltage, which affect the integration and retention of data, especially in three-dimensional memory structures.
Innovation Solution
A semiconductor memory device and operating method that adjust the potential level of the source control voltage and source line voltage based on the position of the selected memory cell relative to the drain select transistor during program verify operations, ensuring uniform current flow and improved accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a uniform source control voltage is applied to all memory cells during program verify operation, then the circuit design is simplified, but the accuracy of program verify operation deteriorates due to position-dependent voltage variations
Solution Approach 1:
The patent applies different source control voltage levels to different groups of memory cells based on their physical position relative to the drain select transistor. Memory cells closer to the drain select transistor receive higher source control voltage levels, while those farther away receive lower levels. This local differentiation compensates for position-dependent voltage drops and improves program verify accuracy without requiring complete customization of each individual cell's voltage.
2Measurement precision
If the source control voltage is increased for memory cells closer to the drain select transistor, then the program verify accuracy is improved, but the energy consumption increases
Solution Approach 1:
The patent dynamically adjusts the source control voltage parameter based on the position of selected memory cells. By changing the voltage level according to position rather than using a fixed high voltage for all cells, the system achieves accurate program verify operations while minimizing unnecessary energy consumption. This parameter adaptation allows the system to use only the voltage level required for each specific memory cell group.
3Manufacturing precision
If the potential level of source control voltage is adjusted based on memory cell position, then the threshold voltage distribution is improved, but the control logic complexity increases
Solution Approach 1:
The patent divides the memory cell array into multiple groups based on their position relative to the drain select transistor. Each group is assigned a specific source control voltage level. This segmentation approach allows the control logic to manage voltage distribution in a structured manner, improving threshold voltage distribution while keeping the control complexity manageable through systematic grouping rather than individual cell control.
Data Source
AI summary
There are provided a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of memory cells connected between a source select transistor and a drain select transistor, a peripheral circuit for performing a program operation on the memory cell array, and a control logic for controlling the peripheral circuit such that the potential level of a source control voltage applied to the source select transistor as a selected memory cell is closer to the drain select transistor in a program verify operation during the program operation.