Semiconductor Memory Device Incremental Step Pulse Programming
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Solution Overview
Problem
Semiconductor memory devices face challenges in achieving both fast programming speed and reliable threshold voltage distribution, as rapid programming often deteriorates threshold voltage distribution, while slower programming improves distribution but increases time.
Innovation Solution
A method involving incremental step pulse programming, where the program pulse voltage is increased by a step voltage that linearly decreases at each repetition, combined with a dummy pulse to ensure successful programming and maintain threshold voltage distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If rapid programming is applied to semiconductor memory devices, then programming speed is improved, but threshold voltage distribution deteriorates
Solution Approach 1:
The programming process is segmented into multiple iterations with incremental voltage steps. Instead of applying a single high-voltage pulse, the method divides programming into stages where voltage is increased by small increments (e.g., 0.5V to 2V steps) across multiple pulses, allowing gradual charge trapping that maintains threshold voltage distribution while achieving fast programming.
Solution Approach 2:
The programming voltage is made dynamic rather than static. The voltage level adjusts iteratively based on verification results, starting from an initial voltage and increasing by predetermined step amounts until the target threshold voltage is reached. This dynamic adjustment optimizes both speed and distribution by adapting voltage application to actual programming progress.
2Manufacturing precision
If slower programming is applied to improve threshold voltage distribution, then manufacturing precision is improved, but programming time increases
Solution Approach 1:
The programming process maintains continuous useful action through iterative verification and incremental voltage application. Rather than using conservative slow programming, the method continuously applies optimized voltage pulses with verification in between, ensuring that each pulse contributes effectively to programming while maintaining distribution quality, thus reducing total programming time.
Solution Approach 2:
Verification feedback is integrated into the programming process to optimize timing. After each voltage pulse, the threshold voltage is verified, and subsequent voltage steps are determined based on this feedback. This allows the system to accelerate programming when conditions permit while maintaining distribution quality, reducing unnecessary delays.
Data Source
AI summary
A semiconductor memory device includes a plurality of memory cells connected to a plurality of word lines; a peripheral circuit suitable for applying a program pulse to at least one of the word lines, performing a program verification operation to the plurality of memory cells by using a first program verification voltage; and a control logic suitable for controlling the peripheral circuit to repeat the applying of the program pulse and the performing the program verification operation until program verification passes by increasing a level of the program pulse by an amount of a step voltage at each repetition, wherein a size of the step voltage decreases at each repetition.