Memory Device Voltage Switching for EMI Reduction
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Solution Overview
Problem
Increasing the transfer clock frequency in semiconductor storage devices like NAND type flash memory leads to issues with electromagnetic interference (EMI) and increased power consumption, and reducing signal voltages to mitigate these problems risks damaging I/O cells due to unexpected voltage applications.
Innovation Solution
A memory device and host device system that can switch between two signal voltages, with a memory controller and host control section managing the voltage change by sending a command signal, detecting voltage levels, and ensuring stable voltage transitions to prevent damage, using regulators and comparators to generate and verify the 1.8 V signal from a 3.3 V supply.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the transfer clock frequency is increased to achieve faster data transfer, then the productivity is improved, but the electromagnetic interference increases and power consumption increases
Solution Approach 1:
The patent changes the voltage parameter of the data signal from the conventional 3.3V to a lower voltage level. This parameter change reduces the electromagnetic radiation and power consumption while maintaining the high-speed data transfer capability, thus resolving the contradiction between productivity improvement and harmful electromagnetic interference generation.
2Loss of energy
If the signal voltage is reduced to lower power consumption and EMI, then the use of energy and harmful factors are reduced, but the reliability deteriorates due to risk of I/O cell damage
Solution Approach 1:
The host device performs preliminary actions by applying test voltages to the data signal lines before actual data transfer. The memory device responds with acknowledgment signals, allowing the host to verify that the low-voltage interface is properly established and safe to use, thus preventing I/O cell damage while enabling energy-efficient operation.
Solution Approach 2:
The patent implements a feedback mechanism where the memory device sends response signals to the host device during voltage transition. The host device monitors these responses to confirm proper voltage level establishment before proceeding with data transfer, ensuring reliability while maintaining low power consumption.
3Object-generated harmful factors
If the signal voltage is changed from 3.3V to lower voltage, then the electromagnetic interference and power consumption are reduced, but the device complexity increases due to voltage switching control requirements
Solution Approach 1:
The patent utilizes existing command and response signal lines for dual purposes: both for normal data communication and for voltage transition control. The host device sends voltage transition requests using existing command protocols, and the memory device responds using existing response signal lines, eliminating the need for separate control lines and reducing overall device complexity.
Data Source
AI summary
A memory card 100 having a NAND type flash memory connectable to a host device 200, capable of transmitting/receiving a signal to/from the host device 200 at a first voltage (3.3 V) or a second voltage (1.8 V) and safely changing a signal voltage of a transmission/reception signal that mutually checks a signal voltage through handshake processing with the host device 200 when the signal voltage is switched.