Semiconductor Memory Device Dynamic Voltage Timing Control
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Solution Overview
Problem
Current semiconductor memory devices face challenges in optimizing the read and write operations due to variations in voltage and current timing, leading to inefficiencies and potential damage to reliability, particularly in the timing of voltage supply to word lines and select gate lines.
Innovation Solution
The semiconductor memory device incorporates a control device that adjusts the voltage and current of the first wiring connected to the gate electrode of the memory transistor, allowing for precise control of the read and write operations by varying the timing based on voltage, current, and charge flow, thereby optimizing the waiting period between voltage supply stages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the waiting period between voltage supply stages is extended to ensure reliability, then device reliability is improved, but operation speed deteriorates
Solution Approach 1:
The patent applies dynamics by making the waiting period adjustable rather than fixed. The control device dynamically sets the waiting period between first and second voltage supply stages based on detected values from the memory device, allowing the timing to adapt to different operational conditions and achieve optimal balance between reliability and speed
Solution Approach 2:
The patent changes the timing parameter (waiting period) based on detected operational parameters. By detecting values during operation and adjusting the waiting period accordingly, the system optimizes both reliability and operation speed under varying conditions
2Speed
If the waiting period is minimized for high-speed operation, then operation speed is improved, but manufacturing precision requirements worsen
Solution Approach 1:
The patent employs feedback by detecting operational values from the memory device and using this information to adjust the waiting period. This closed-loop control compensates for manufacturing variations and ensures accurate timing even with minimized waiting periods
Solution Approach 2:
The control device preliminarily sets the waiting period based on detected values before executing the next operation. This preliminary adjustment ensures that timing is optimized for each specific operational context, accommodating manufacturing variations
Data Source
AI summary
A semiconductor memory device comprises: a memory transistor; a first wiring connected to a gate electrode of the memory transistor; and a control device that executes a read operation to read data of the memory transistor and a write operation to write data in the memory transistor. In the read operation or the write operation, the control device: increases a voltage of the first wiring to a first voltage from a first timing to a second timing; and adjusts a length from the first timing to the second timing corresponding to at least one of a voltage of the first wiring, a current of the first wiring, and an amount of charge flowed through the first wiring.