Memory Device Internal Data Swapping via XOR Logic
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Solution Overview
Problem
Existing semiconductor memory devices face inefficiencies in data swapping between different memory regions, leading to increased overhead and decreased swap speed due to the need for data communication with a memory controller.
Innovation Solution
A memory device and operating method that enable data swapping within the device itself, utilizing a data buffer and XOR operations to transfer data between memory regions without relying on an external memory controller, thereby reducing communication overhead and enhancing swap speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data swapping is performed through memory controller communication, then data can be transferred between memory regions, but communication overhead increases and swap speed decreases
Solution Approach 1:
The patent extracts the data swapping function from the memory controller and implements it directly within the memory device. The memory device includes a data buffer and control logic that perform XOR operations and data swapping internally, eliminating the need for data to be transferred through the memory controller. This extraction of the swapping function resolves the contradiction by removing the communication overhead while maintaining the data transfer capability.
Solution Approach 2:
The patent introduces an intermediary data buffer structure within the memory device that facilitates direct data swapping between memory regions. The data buffer acts as a mediator that holds data temporarily during the swapping process, enabling internal exchange without external controller involvement. This intermediary structure enables fast swapping while reducing communication overhead.
2Adaptability or versatility
If a separate swap buffer is used in the memory controller, then data swapping can be performed, but the memory controller requires additional resources and communication overhead increases
Solution Approach 1:
The patent merges the data swapping capability directly into the memory device structure, combining the buffer and control logic needed for swapping with the existing memory array. Instead of having a separate swap buffer in the memory controller, the swapping function is integrated into the memory device itself. This merging eliminates the need for additional memory controller resources while maintaining full data swapping capability.
Solution Approach 2:
The memory device performs data swapping on its own using internal buffers and control logic, without requiring external assistance from the memory controller. The device includes XOR gates and control circuits that automatically perform the swapping operation when triggered by specific commands. This self-service approach eliminates the need for separate swap buffers in the controller and reduces communication overhead.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for faster data swapping and decreased communication overhead between the memory device and controller, improving data transfer efficiency within the memory device.
Implementation Method 1
an XOR gate that performs a second XOR operation on the first result data of the data comparison write circuit and the first data from the read circuit and generates the second data
Data Source
AI summary
An operating method of a memory device, which includes a first memory region and a second memory region, includes reading first data from the first memory region and storing the read first data in a data buffer block, performing a first XOR operation on the first data provided from the data buffer block and second data read from the second memory region to generate first result data, writing the first data stored in the data buffer block in the second memory region, performing a second XOR operation on the first data and the first result data to generate the second data, storing the generated second data in the data buffer block, and writing the second data stored in the data buffer block in the first memory region.