Hierarchical Memory Diagnosis for Coupling Faults
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Solution Overview
Problem
Current memory diagnosis methods, such as Walkpath and Galpat, are inefficient for large memory sizes due to high diagnostic time and low accuracy in detecting coupling faults between bit cells, making them unsuitable for regular use in systems requiring high reliability like emergency-stop sequence-control apparatuses.
Innovation Solution
A memory diagnosis apparatus that employs intra-block, intra-word, inter-word, and inter-sub-array testing units to hierarchically diagnose failures, reducing the number of memory accesses and diagnosis time by testing for failures within and between blocks, words, and sub-arrays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If Walkpath or Galpat is used to diagnose coupling faults, then diagnostic accuracy is improved, but diagnosis time increases significantly for large memory sizes
Solution Approach 1:
The memory is divided into multiple blocks, and the diagnosis is performed in two stages: first diagnosing each block independently using Walkpath/Galpat, then diagnosing inter-block coupling faults. This segmentation reduces the overall diagnosis time from O(N²) to O(N×M) where N is the number of blocks and M is the block size, making it feasible for large memory sizes.
Solution Approach 2:
The invention adds a hierarchical dimension to the diagnosis process by introducing inter-block diagnosis after intra-block diagnosis. This multi-level approach (intra-block then inter-block) transforms the single-phase O(N²) diagnosis into a two-phase process that achieves better time complexity while maintaining comprehensive fault detection.
2Measurement precision
If Walkpath or Galpat is used to diagnose coupling faults, then coupling fault detection is improved, but the number of memory accesses increases
Solution Approach 1:
By segmenting the memory into blocks and performing diagnosis at the block level first, the invention reduces the number of individual memory cell accesses. Instead of accessing every cell pair in a large memory, it accesses blocks as units, significantly reducing the total number of memory accesses while maintaining detection accuracy.
3Productivity
If test data width is increased to improve diagnosis speed, then processing speed is improved, but diagnostic accuracy decreases due to inability to detect coupling faults between bit cells
Solution Approach 1:
The invention segments the diagnosis into two independent parts: intra-block diagnosis (using Walkpath/Galpat for coupling faults) and inter-block diagnosis. This allows the system to maintain high processing speed through parallel block diagnosis while ensuring accurate detection of coupling faults between bit cells through the systematic two-stage approach.
Solution Approach 2:
By adding the inter-block diagnosis dimension after intra-block diagnosis, the system achieves comprehensive fault detection without sacrificing speed. The hierarchical structure allows width increase for faster processing while maintaining accuracy through the additional diagnostic dimension.
Data Source
AI summary
A memory diagnosis apparatus include an intra-word testing unit that tests for a coupling fault in each bit in each word in a memory, an inter-word testing unit that tests for a coupling fault between words in each sub-array each being plural words in the memory, and an inter-block testing unit that tests for a coupling fault between sub-arrays in the memory.