Memory Die Controller Address Mapping
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Solution Overview
Problem
In solid-state data storage systems, performing all address mapping functions at a storage device-level controller can negatively impact performance and efficiency due to the inefficient transfer of large amounts of data and computational burdens on centralized processing circuitry.
Innovation Solution
A system where a memory die controller associated with a non-volatile memory die performs physical-to-logical address mapping and error correction, reducing the burden on the storage controller by directly determining addressing information without transferring large volumes of data, and communicating the results to the storage controller for further processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If all address mapping functions are performed at the storage device-level controller, then centralized control and management are simplified, but performance and efficiency deteriorate due to inefficient data transfer and computational burden
Solution Approach 1:
The patent divides the address mapping function into two segments: the storage device-level controller generates mapping requests and receives results, while the memory die controller performs the actual address mapping and error correction. This segmentation distributes computational burden and improves efficiency without sacrificing centralized control.
Solution Approach 2:
The memory die controller acts as an intermediary between the storage controller and the non-volatile memory die. It receives mapping requests from the storage controller, performs address mapping and error correction locally, then returns results to the storage controller, thereby reducing the storage controller's computational burden and improving overall system efficiency.
2Loss of information
If large amounts of data are transferred to the storage controller for processing, then complete address mapping information is available, but communication bandwidth is consumed and transfer time increases
Solution Approach 1:
The patent extracts the address mapping and error correction operations from the storage controller and relocates them to the memory die controller. Only the essential mapping requests and results are transferred between controllers, while the bulk data processing occurs locally at the memory die controller, thereby minimizing data transfer time and bandwidth consumption.
3Reliability
If centralized processing circuitry performs all error correction operations, then error management is unified, but computational overhead at the storage controller increases
Solution Approach 1:
The memory die controller performs error correction operations locally on the non-volatile memory die without requiring the storage controller to process the data. This self-service approach maintains unified error management under the storage controller's coordination while significantly reducing the computational overhead and energy consumption at the storage controller.
Data Source
AI summary
An apparatus includes a storage controller, a non-volatile memory die comprising a set of memory elements and a memory die controller associated with the non-volatile memory die. The memory die controller is configured to identify a portion of the non-volatile memory die for mapping logical addresses, read a header of a sub-portion of the identified portion, for a logical address, map a physical address corresponding to the logical address of the sub-portion to a physical-to-logical mapping and transmit the physical-to-logical mapping to the storage controller.