Memory Die Fault Detection Through Dual-Use Calibration Pin
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Solution Overview
Problem
Non-volatile memory devices, such as DRAM, face circuit faults that go undetected due to the lack of dedicated pins for fault detection, leading to increased pin count and offline detection constraints.
Innovation Solution
Utilizing a calibration pin, such as the ZQ pin, to indicate circuit faults by coupling an internal voltage to a host device, allowing for reduced pin count and real-time fault detection across multiple memory dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated pins are added to each memory die for fault detection, then fault detection capability is improved, but pin count increases
Solution Approach 1:
The calibration pin is designed to serve dual purposes: performing its original calibration function and indicating fault conditions. By making the calibration pin multi-functional, the patent eliminates the need for separate dedicated fault detection pins, thereby maintaining fault detection capability while reducing pin count.
Solution Approach 2:
The patent merges the calibration function and fault indication function into a single pin structure. The calibration pin is combined with fault detection capability, so that one pin performs multiple roles that would traditionally require separate pins, thus reducing overall device complexity.
2Device complexity
If offline fault detection methods are used, then device complexity is reduced, but detection timing is delayed
Solution Approach 1:
The calibration pin provides real-time feedback about fault conditions by changing its electrical characteristics (such as impedance or voltage level) when a fault is detected. This feedback mechanism enables online fault detection, allowing the system to immediately recognize and respond to faults without waiting for offline testing procedures.
Solution Approach 2:
The memory device performs self-diagnosis by monitoring its own operational status through the calibration pin. The device automatically detects faults and signals them through the calibration pin without requiring external testing equipment or offline procedures, enabling continuous online monitoring.
Data Source
AI summary
Methods, systems, and devices for memory die fault detection using a calibration pin are described. A memory device may perform a calibration procedure on a first resistor of each of a set of memory dies of a memory module using a pin coupled with the memory module. The memory device may couple the pin to a second resistor of a memory die of the set of memory dies based on the memory die identifying a fault condition for the memory die executing one or more of multiple commands from the host device. The memory device may receive, from the host device, a command to read a register of one or more memory dies of the set of memory dies and may output, to the host device, an indication of the memory die that identified the fault condition based on coupling the pin to the second resistor.