Memory Die ODT Layout for Shared Read Enable Signal Integrity

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Solution Overview

Problem

Conventional memory systems face issues with signal integrity due to long stub lines between memory dies, which can lead to electrical interference, particularly when one die is a target and the other is a non-target during read and write operations, as they are unable to effectively provide on-die termination (ODT) for the non-target die.

Innovation Solution

The proposed solution involves configuring memory dies such that the REn and DQS paths of one die are connected to the same electrical line, with each die having detection circuits to activate ODT based on the condition of the REn signal, ensuring proper termination resistance is provided for both read and write commands, even when the die is non-target.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple memory dies are connected to the same signal lines, then the memory system capacity is increased, but the stub line length increases causing signal integrity degradation

Engineering Contradiction:
Improvememory die quantityVSAvoidsignal integrity
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The signal transmission path is segmented by introducing separate path configurations for target and non-target dies. The non-target die uses a direct connection path while the target die uses a path through the other die, effectively dividing the stub line into shorter segments that reduce signal reflection and interference.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a dimensional change in the signal path configuration by utilizing the cross-coupling architecture where signals can travel through different physical paths. This creates additional transmission dimensions that allow shorter effective stub lengths while maintaining multiple die connections.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If conventional ODT configuration is used, then the target die can provide termination resistance, but the non-target die cannot provide ODT for the shared signal lines

Engineering Contradiction:
Improvetermination resistanceVSAvoidODT availability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

Each memory die is designed with dual functionality to provide ODT for both its own signal lines and the shared signal lines. The non-target die's ODT circuit can be activated to terminate signals on the shared lines during write operations, making the termination capability universal across all signal line scenarios.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The ODT circuits are dynamically controlled based on the operational mode and target die identification. Control logic dynamically enables or disables ODT in each die according to whether it is the target or non-target die, allowing flexible adaptation of termination resistance to match the operational requirements.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12554633B2Non-target on-die termination
Publication Date: 2026.02.17 SANDISK TECHNOLOGIES LLC
  • US12554633B2 patent drawing
  • US12554633B2 patent drawing
  • US12554633B2 patent drawing

AI summary

Technology for a memory system having on-die termination (ODT) in a non-target memory die. A read enable path of a first die and a data strobe path of a second die are connected to a first electrical line. However, a data strobe path of the second die and a read enable path of the first die are connected to a second electrical line. Each die contains detection circuit that detects a condition of line that carries a read enable signal when that die is a non-target. The die enables ODT to provide termination resistance for the electrical line that carries the read enable signal when that die is the non-target.