Memory Die Power State Transition via Programmable Counters
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Solution Overview
Problem
High-density solid state drives (SSDs) with many 3D cross-point memory dies consume significant power even when idle, leading to performance throttling due to the need to stay within power and heat envelopes, and individual die-level power management adds complexity to the memory device controller.
Innovation Solution
Implementing programmable counters at each memory die to automatically transition from an idle power state to a low power state after operations, with additional counters for further power reduction, managed by a memory device controller via a command bus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If individual die-level power management is implemented by the memory device controller, then power consumption can be reduced, but the complexity of the memory device controller increases
Solution Approach 1:
Each memory die includes its own power management circuitry that automatically transitions between power states based on local conditions. The die monitors its own activity and autonomously enters low-power states without requiring continuous controller intervention, thereby reducing controller complexity while maintaining power management effectiveness.
Solution Approach 2:
Power management functionality is segmented from the central controller and distributed to individual memory dies. Each die operates as an independent unit with its own power state control, allowing parallel operation and reducing the burden on the memory device controller.
2Loss of energy
If individual die-level power management is implemented, then power consumption can be reduced, but bus bandwidth is consumed for managing power states
Solution Approach 1:
Memory dies autonomously monitor their own activity status and independently transition to low-power states without requiring continuous polling or commanding from the controller. This self-service approach eliminates the need for dedicated bus transactions for power state management, preserving bus bandwidth for data operations.
Solution Approach 2:
Instead of continuous controller-mediated power management, dies use periodic or event-driven transitions based on their own activity detection. Power state changes occur only when necessary, reducing unnecessary bus traffic while maintaining effective power savings.
3Speed
If memory dies remain in idle power state, then quick access is maintained, but power consumption increases significantly
Solution Approach 1:
Memory dies dynamically transition between multiple power states (active, idle, and low-power states) based on their current activity and predicted future usage. This dynamic state management allows the system to optimize between speed and power consumption in real-time, entering low-power states when access is unlikely while maintaining quick access readiness when needed.
Solution Approach 2:
The patent introduces programmable delay parameters that control the timing of transitions between power states. By adjusting these parameters, the system can fine-tune the balance between maintaining quick access (faster transitions to active state) and maximizing power savings (longer duration in low-power states), adapting to different workload patterns.
Data Source
AI summary
Examples are given for techniques for entry to a lower power state for a memory device or die. The examples to include delaying transitions of the memory device or die from a first higher consuming power state to a second relatively lower power state using one or more programmable counters maintained at or with the memory device.