Memory Die Stack Stepped Molding to Prevent Package Warpage
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Solution Overview
Problem
The warpage phenomenon in semiconductor chips due to differences in thermal expansion coefficients between molding members and non-conductive films leads to contact failures during the stacking process.
Innovation Solution
A method involving the use of an adhesive member to stack memory dies, forming a first molding member to cover the stack, polishing to expose the uppermost memory die, removing edge portions with the adhesive member to create a stepped portion, and then forming a second molding member to cover the stepped portion, preventing exposure of the adhesive member and thus minimizing warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a molding member covers the stacked semiconductor chips, then the chips are protected and held together, but the non-conductive film may be exposed from the molding member causing warpage and contact failure
Solution Approach 1:
The patent removes the exposed non-conductive film from between the molding member and the semiconductor chips. This extraction eliminates the source of differential thermal expansion that causes warpage, while the molding member continues to provide protection and structural support for the stacked chips.
Solution Approach 2:
The patent performs preliminary removal of the non-conductive film before final packaging is completed. By addressing the exposure issue in advance, the structure is prepared to prevent warpage during subsequent thermal processing and operation, ensuring long-term contact integrity.
2Ease of manufacture
If the non-conductive film is allowed to overflow and fill spaces between chips, then bonding is facilitated, but the film becomes exposed from the molding member causing thermal expansion issues
Solution Approach 1:
The patent extracts the problematic portion of the non-conductive film that becomes exposed from the molding member. This selective removal maintains the bonding function where the film is needed between chips while eliminating the precision defect of film exposure on the package surface.
Solution Approach 2:
The patent applies different treatments to different locations of the non-conductive film: it is retained in the spaces between chips for bonding purposes, but removed from areas where it would be exposed from the molding member. This local differentiation resolves the contradiction between bonding ease and exposure control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents warpage by ensuring the adhesive member is not exposed from the second molding member, thereby maintaining contact integrity between semiconductor chips.
Implementation Method 1
stacking, via an adhesive member, a plurality of memory dies to form a memory die stack
Implementation Method 2
polishing an upper surface of the first molding member to expose an upper surface of an uppermost memory die
Data Source
AI summary
A method of manufacturing a semiconductor package comprises stacking, via an adhesive member, a plurality of memory dies to form a memory die stack on a buffer die; forming a first molding member on the buffer die to cover the memory die stack; polishing an upper surface of the first molding member to expose an upper surface of an uppermost memory die in the memory die stack, the uppermost memory die positioned in an uppermost layer in the memory die stack; removing edge portions of the uppermost memory die together with at least a portion of the first molding member and at least a portion of the adhesive member to form a stepped portion; and forming a second molding member on the first molding member to cover the stepped portion of the uppermost memory die.