Memory Die Write Buffering for Power-Limited Burst Operations
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Solution Overview
Problem
Write operations in phase-change-based memory consume a lot of energy, limiting the frequency of memory operations, necessitating rank or die changes that incur additional switching costs.
Innovation Solution
Implementing a memory die buffer to space out write operations, allowing multiple consecutive writes before switching ranks or dies, thereby optimizing memory operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If write operations are performed frequently in phase-change-based memory, then data rate is improved, but energy consumption increases and power limits are exceeded
Solution Approach 1:
The buffer stores write operations in advance before they are executed, allowing the memory die to prepare for subsequent writes without immediate energy consumption. This preliminary buffering action enables the system to maintain high data rates while managing power consumption by executing writes in batches rather than continuously.
Solution Approach 2:
The buffer enables continuous acceptance of write operations from the microcontroller while the memory die executes them at a controlled pace. This continuity allows the data rate to be maintained at maximum command rate without exceeding power limits, as the buffer bridges the gap between continuous data arrival and spaced-out execution.
2Use of energy by moving object
If rank or die changes are performed to avoid power limits, then energy consumption is managed, but additional switching costs and time are incurred
Solution Approach 1:
The buffer stores multiple write operations in advance, allowing the microcontroller to batch operations before switching ranks or dies. This preliminary batching reduces the frequency of rank/die switches by consolidating multiple writes that could be executed on the same die, thereby reducing switching time and overhead.
Solution Approach 2:
Multiple write operations are merged into a single buffered operation, allowing them to be executed together on the same die without intermediate switching. This combining of operations reduces the number of rank/die transitions required, saving switching time and improving overall efficiency.
3Productivity
If multiple consecutive write operations are sent to the same memory die, then operation efficiency is improved, but power limits are exceeded
Solution Approach 1:
The buffer enables continuous receipt of write operations from the microcontroller while maintaining spaced-out execution to comply with power limits. The useful action of data transfer continues without interruption, but the actual write execution is throttled to manage power consumption, achieving both efficiency and power management.
Solution Approach 2:
The buffer implements periodic execution of write operations, spacing them out in time to comply with power limits while maintaining continuous data flow. This periodic action allows multiple writes to be processed on the same die without exceeding power constraints, balancing efficiency and power management.
Data Source
AI summary
Techniques for burst memory write operations are disclosed. In the illustrative embodiment, a memory die is limited in how quickly it can perform memory write operations that it receives from a microcontroller due to thermal constraints. The memory die can mitigate the need for the microcontroller to perform a costly rank switch to send an operation to another die by buffering memory write operations. The microcontroller can then send several consecutive memory write operations to a first memory die before switching to a second memory die. The first memory die can then perform the memory write operations while the microcontroller has moved on to other memory operations.


