3D Non-Volatile Memory Source Discharge Contact Structure
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Solution Overview
Problem
The integration density of two-dimensional non-volatile memory devices is limited, and three-dimensional non-volatile memory devices face challenges in improving operational reliability.
Innovation Solution
A semiconductor device with a source layer and discharge contact structure, including interlayer insulating layers and conductive patterns, allows for charge discharge through a dielectric layer, enhancing the manufacturing process and integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If two-dimensional non-volatile memory devices are used, then manufacturing process is simple, but integration density is limited
Solution Approach 1:
The patent transitions from two-dimensional planar memory cells to three-dimensional vertical stacking architecture. Multiple memory cell strings are stacked vertically over the substrate, with source layers, channel layers, and drain layers arranged in vertical columns. This dimensional change enables significantly higher integration density by utilizing the vertical space above the substrate rather than only the horizontal plane.
Solution Approach 2:
The memory device is segmented into multiple independent memory cell strings stacked vertically. Each string contains source, channel, and drain layers that can be independently formed and controlled. This segmentation allows parallel processing during manufacturing and enables high-density packing while maintaining manageable complexity through modular construction.
2Quantity of substance
If three-dimensional non-volatile memory devices are implemented, then integration density increases, but operational reliability deteriorates
Solution Approach 1:
A discharge contact structure is implemented that includes a dielectric layer disposed between the source layer and the discharge contact. This dielectric layer acts as a cushioning element that prevents direct contact and potential damage between the source layer and discharge contact, thereby protecting the memory device structure and improving operational reliability in the three-dimensional configuration.
Solution Approach 2:
The dielectric layer serves as an intermediary element between the source layer and discharge contact. It mediates the interaction by providing electrical isolation and mechanical support, preventing direct stress transmission and potential structural failure. This intermediary structure enhances the reliability of charge discharge operations in the vertical stacking architecture.
3Reliability
If discharge contact structure with dielectric layer is added, then operational reliability improves, but device complexity increases
Solution Approach 1:
The discharge contact structure with dielectric layer is designed to serve multiple functions: electrical discharge, mechanical support, and structural protection. By integrating these functions into a single standardized component, the patent improves reliability without proportionally increasing complexity. The same dielectric layer material and formation process can be applied across all memory cell strings, enabling universal manufacturing.
Solution Approach 2:
The discharge contact structure is merged with the vertical stacking architecture, where the dielectric layer is integrated into the existing layer sequence during the stacking process. This merging allows the reliability-enhancing feature to be incorporated without requiring separate fabrication steps, thereby minimizing the increase in device complexity while achieving improved operational reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves the integration density and operational reliability of three-dimensional non-volatile memory devices, enabling efficient charge discharge and increased data storage capacity.
Implementation Method 1
a dielectric layer disposed between the source layer and the discharge contact
Data Source
AI summary
A semiconductor device and a method of manufacturing the semiconductor includes a first source layer spaced apart from a substrate and disposed in a memory cell region of the substrate, a second source layer spaced apart from the substrate and disposed in a contact region of the substrate, a cell stacked structure including interlayer insulating layers and conductive patterns alternately stacked on each other over the first source layer, a discharge contact passing through at least a part of the second source layer, and a dielectric layer disposed between the second source layer and the discharge contact.