Memory Disturb Detection via Offset Threshold Voltage Measurement
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Solution Overview
Problem
Non-volatile memory devices, such as flash solid state memory, face increased bit error rates due to inaccurate data state maintenance, leading to potential data failures from unselected sub-block disturbs during programming and erasing operations.
Innovation Solution
Implementing a method for detecting memory disturbs by measuring threshold voltage distributions across offset thresholds, allowing for data maintenance through compensating pulses or data relocation to maintain accurate data states, thereby preventing unrecoverable failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple bits are stored in each flash memory cell to increase storage density, then storage density is improved, but bit error rate increases due to inaccurate data state maintenance
Solution Approach 1:
The patent performs disturb detection by measuring threshold voltage distributions at offset thresholds before data becomes unrecoverable. This preliminary detection allows the system to identify potential bit errors caused by unselected sub-block disturbs and take corrective action (such as relocating data or applying compensating pulses) before the errors propagate and cause data loss, thus maintaining reliability while preserving high storage density
Solution Approach 2:
The patent implements a feedback mechanism where the measured threshold voltage distributions are compared against expected ranges, and corrective actions are triggered based on the detection results. This feedback loop continuously monitors and maintains data state accuracy, preventing bit error rate degradation even as storage density increases through multi-bit per cell operations
2Device complexity
If unselected sub-block disturbs are not detected and mitigated, then device complexity is reduced, but data reliability deteriorates due to potential unrecoverable failures
Solution Approach 1:
The patent divides the memory block into unselected sub-blocks and selectively applies disturbs (program or erase operations) to specific sub-blocks while monitoring the others. This segmentation allows the system to detect disturbs in unselected sub-blocks without requiring complex global monitoring, as each sub-block can be independently measured and evaluated for disturb conditions
Solution Approach 2:
The patent changes the measurement parameter by using offset thresholds instead of standard read thresholds to detect disturb conditions. By measuring threshold voltage distributions at offset thresholds, the system can identify subtle shifts caused by unselected sub-block disturbs that would be invisible at standard thresholds, thereby detecting potential errors without requiring overly complex detection circuitry
Data Source
AI summary
An apparatus includes an array of memory cells comprising a first sub-block and a second sub-block electrically coupled by a channel. The apparatus also includes a measurement circuit configured to take a first measurement of a first sub-block of memory cells at a first offset threshold and a second measurement of the first sub-block of memory cells at a second offset threshold. The apparatus further includes a detection circuit configured to detect a disturb condition of the first sub-block based on at least one of the first measurement and the second measurement, and to initiate data maintenance in response to the disturb condition of the first sub-block.