Memory DLL Locking Time Determination for Lower Latency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Setting a target locking time for a delay locked loop in memory apparatuses is challenging due to variations in process, voltage, clock rate, and temperature, often requiring a high locking time that may be unnecessary, leading to latency issues.
Innovation Solution
A system comprising a signal generating device, a measuring device, and a computing device that inputs signals with varying operational parameters, measures output signals, and determines a target locking time by identifying candidate operational parameters where the delay locked loop does not fail, using two-dimensional plots to visualize and select optimal parameters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high locking time is set for the delay locked loop, then stability is improved, but latency increases
Solution Approach 1:
The patent implements dynamic locking time adjustment by continuously monitoring DLL operation status and adapting the locking time parameter in real-time. The system transitions from a static, fixed locking time approach to a dynamic one where the locking time is modified based on actual operational conditions, allowing the system to achieve stability when needed while minimizing latency when the DLL is functioning properly.
Solution Approach 2:
The patent changes the locking time parameter based on monitored DLL performance metrics. By detecting DLL fail states and adjusting the locking time parameter accordingly, the system optimizes the balance between stability and latency. The parameter is increased when instability is detected and decreased when the DLL operates normally,实现ing adaptive optimization.
2Reliability
If a fixed high locking time is used, then reliability is improved, but productivity decreases
Solution Approach 1:
The system dynamically adjusts the locking time parameter based on real-time DLL status monitoring, transitioning from a static fixed value to a dynamic adaptive value. This allows the memory system to maintain high reliability when DLL issues are detected while maximizing productivity during normal operation by using optimized, shorter locking times.
Solution Approach 2:
The monitoring system automatically detects DLL fail states and triggers appropriate responses without external intervention. The system self-regulates the locking time parameter based on its own operational status, eliminating the need for manual configuration and enabling automatic optimization of the reliability-productivity trade-off.
3Device complexity
If the target locking time is not precisely determined, then device complexity is reduced, but measurement precision worsens
Solution Approach 1:
The patent replaces complex manual or trial-and-error locking time determination methods with an automated electronic monitoring and detection system. The monitoring device electronically tracks DLL operation status and automatically determines the optimal locking time, substituting mechanical or manual adjustment processes with electronic automation that achieves both precision and manageable complexity.
Solution Approach 2:
The system implements a feedback mechanism where the monitoring device continuously observes DLL performance and feeds this information back to adjust the locking time parameter. This closed-loop feedback system automatically determines the precise target locking time based on actual DLL behavior, achieving high measurement precision through systematic observation and adaptation.
Data Source
AI summary
A method for determining a target locking time for a delay locked loop of a memory apparatus are provided. The method includes, a system inputting a first set of input signals to the memory apparatus in accordance with a first set of first operational parameters and a set of second operational parameters, the system measuring a first set of output signals from the memory apparatus in response to the first set of input signals to determine whether the delay locked loop fails at any combination of the first set of first operational parameters and the set of second operational parameters, the system determining a first candidate operational parameter from the first set of first operational parameters under which the delay locked loop does not fail for each of the set of second operational parameters, and the system determining the target locking time based on the first candidate operational parameter.