Memory Device MBIST Status Indication via DMI Bit

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Solution Overview

Problem

Existing memory devices lack an efficient method to indicate the status of a memory built-in self-test (MBIST) without requiring additional control signals or pins, which can complicate manufacturing and in-field testing processes.

Innovation Solution

Utilizing the Data Mask Inversion (DMI) bit, an existing control signal, to indicate whether the memory device is performing an MBIST or not, allowing the host device to determine the status without adding new pins or signaling configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional control signals or pins are added to indicate MBIST status, then the memory device can provide clear status indication, but the device complexity and manufacturing complexity increase

Engineering Contradiction:
ImproveMBIST status indicationVSAvoidpin configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent reuses an existing control signal (DMI bit) for a dual purpose: its original function and the new function of indicating MBIST status. This allows the memory device to provide status indication without adding new pins, resolving the contradiction between reliability and device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory device uses its own existing control signal infrastructure to indicate its operational status during MBIST. Instead of requiring external indication mechanisms, the device self-indicates its status through the DMI bit, eliminating the need for additional pins or external components.

Inventive Principle:
Principle #25Self-service

2Reliability

If additional control signals or pins are added to indicate MBIST status, then the memory device can provide clear status indication, but the manufacturing process becomes more complex

Engineering Contradiction:
ImproveMBIST status indicationVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

By making the existing DMI bit multi-functional (serving both its original purpose and MBIST status indication), the patent eliminates the need for additional manufacturing steps, pins, or signal routing that would complicate the manufacturing process.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the MBIST status indication function with the existing DMI control signal. This consolidation means that no separate indication circuitry or additional pins need to be manufactured, thereby simplifying the overall manufacturing process while still providing reliable status indication.

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If existing control signals are reused to indicate MBIST status, then the device complexity is reduced, but the control signal must perform multiple functions

Engineering Contradiction:
Improvepin configurationVSAvoidcontrol signal function
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent explicitly implements multi-functionality by having the DMI bit serve both its original control function and the new MBIST status indication function. This resolves the contradiction by accepting reduced adaptability (the signal has specific defined functions) in exchange for reduced device complexity (no additional pins needed).

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12243607B2Indicating a status of a memory built-in self-test
Publication Date: 2025.03.04 MICRON TECHNOLOGY INC
  • US12243607B2 patent drawing
  • US12243607B2 patent drawing
  • US12243607B2 patent drawing

AI summary

Implementations described herein relate to performing a memory built-in self-test and indicating a status of the memory built-in self-test. A memory device may read one or more bits, associated with a memory built-in self-test, that are stored in a mode register of the memory device. The memory device may identify, based on the one or more bits, that the memory built-in self-test is enabled. The memory device may set a DMI bit of the memory device to a first value and perform the memory built-in self-test based on identifying that the memory built-in self-test is enabled. The memory device may set the DMI bit of the memory device to a second value based on a completion of the memory built-in self-test.