Memory Driver Inverter Circuitry for ISI Jitter Mitigation

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Solution Overview

Problem

Integrated circuit driver circuitry experiences increased intersymbol interference (ISI) jitter due to the use of thin oxide transistors, which are susceptible to interference, especially in multi-standard designs, leading to reduced performance and data errors.

Innovation Solution

Incorporation of mitigation circuitry, such as capacitors or transistor stacks, within the inverter circuitry to reduce parasitic capacitances and mitigate ISI jitter, improving reliability and performance across various memory standards.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If driver circuitry is designed to support multiple memory types, then adaptability is improved, but susceptibility to interference increases

Engineering Contradiction:

Improvesupport for multiple memory typesVSAvoidintersymbol interference

Core Design Contradiction:

Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by introducing mitigation circuitry specifically at the output nodes of the inverter circuitry where intersymbol interference occurs. This targeted approach addresses the interference problem locally without requiring complete redesign of the entire driver circuitry, thus maintaining multi-memory-type support while reducing ISI susceptibility in critical areas.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The mitigation circuitry acts as an intermediary element between the inverter circuitry and the output stage. This intermediate component specifically targets and reduces intersymbol interference without affecting the overall multi-standard functionality of the driver circuitry, allowing the system to maintain adaptability while combating interference.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If mitigation circuitry is added to reduce ISI jitter, then reliability is improved, but device complexity increases

Engineering Contradiction:

Improvereduction of data errorsVSAvoidcircuitry complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the driver circuitry into distinct functional blocks: level shifter circuitry, inverter circuitry, and mitigation circuitry. By dividing the system into separate modules with specific functions, the mitigation circuitry can be added as a discrete component to address ISI jitter without requiring complete redesign of the entire driver circuit, thus limiting the increase in overall device complexity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent extracts the interference mitigation function as a separate, standalone circuitry block that can be selectively applied to the inverter output nodes. This extraction allows the mitigation functionality to be added independently without increasing the complexity of the core driver circuitry, maintaining reliability improvement while controlling device complexity.

Inventive Principle:

Principle #2Taking out (Extraction)

3Manufacturing precision

If thin oxide transistors are used in driver circuitry, then manufacturing precision is improved, but susceptibility to interference worsens

Engineering Contradiction:

Improvetransistor fabrication accuracyVSAvoidinterference susceptibility

Core Design Contradiction:

Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful effect of thin oxide transistor susceptibility to interference by adding mitigation circuitry that specifically counteracts the intersymbol interference generated by these transistors. Rather than abandoning the manufacturing benefits of thin oxide transistors, the design embraces them while adding a compensatory mechanism to neutralize their interference susceptibility.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The mitigation circuitry effectively reduces ISI jitter, enhancing the driver circuitry's performance and reliability, allowing integrated circuits to support multiple memory types with reduced data errors.

Implementation Method 1

The inverter circuitry includes mitigation circuitry coupled to the first output node and the second output node and alters one or more of the first inverted data signal and the second inverted data signal

Methodology Applied

Scientific EffectParasitic capacitance: Parasitic Capacitance

Data Source

PatentUS12489445B2Driver circuitry with reduced intersymbol interference jitter

Publication Date: 2025.12.02 XILINX INC

AI summary

Driver circuitry for memory controller circuitry includes level shifter circuitry, inverter circuitry, and output circuitry. The level shifter circuitry receives an input data signal and outputs a first level shifted data signal and a second level shifted data signal based on the input data signal. The inverter circuitry is connected to the level shifter circuitry, receives the first level shifted data signal and the second level shifted data signal, and outputs a first inverted data signal via a first output node and a second inverted data signal via a second output node. The inverter circuitry includes mitigation circuitry coupled to the first output node and the second output node and alters one or more of the first inverted data signal and the second inverted data signal. The output circuitry outputs an output data signal based on the first inverted data signal and the second inverted data signal.