Memory Device Local Driver Switching to Reduce Global I/O RC Loading

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Solution Overview

Problem

The increase in RC loading of global input/output lines in DRAM devices due to local input/output lines connected with them reduces the performance and reliability of the memory device.

Innovation Solution

A memory device design that includes local drivers which selectively disconnect or connect pre-global input/output lines from the global input/output lines based on the operation of specific memory cells, reducing overall RC loading.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If local input/output lines are connected with global input/output lines, then data transfer capability is improved, but RC loading increases reducing performance and reliability

Engineering Contradiction:
Improvedata transfer capabilityVSAvoidoperation reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements dynamic connection control where local drivers selectively connect or disconnect pre-global input/output lines from global input/output lines based on operation type. During read operations, connections are maintained for data transfer; during write operations or idle states, connections are disconnected to reduce RC loading. This dynamic switching resolves the contradiction by adapting connectivity to operational requirements.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the electrical state parameter of the connection between pre-global and global input/output lines. By controlling the local driver to switch between connected and disconnected states, the effective RC loading parameter is dynamically adjusted. This parameter change allows the system to optimize between data transfer capability and reliability based on operational context.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If local drivers continuously connect pre-global input/output lines to global input/output lines, then signal transfer is ensured, but RC loading increases reducing performance

Engineering Contradiction:
Improvesignal transfer reliabilityVSAvoidoperation performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements periodic connection control where local drivers establish connections only during specific operational periods when data transfer is required. During read operations, connections are activated; during write operations or idle periods, connections are deactivated. This periodic activation ensures signal transfer reliability when needed while minimizing RC loading during non-operational periods, thus resolving the performance contradiction.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system dynamically adjusts the connection state of pre-global input/output lines based on operational requirements. The local driver acts as a dynamic switch that connects lines during read operations and disconnects them during write operations or idle states. This dynamic behavior ensures reliable signal transfer during data operations while reducing RC loading to improve overall performance.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12360675B2Memory device
Publication Date: 2025.07.15 SAMSUNG ELECTRONICS CO LTD
  • US12360675B2 patent drawing
  • US12360675B2 patent drawing
  • US12360675B2 patent drawing

AI summary

Disclosed is a memory device which includes a first memory cell that is electrically connected with a first word line and a first bit line, a first bit line sense amplifier circuit that is electrically connected with the first bit line, a first local sense amplifier circuit that is electrically connected with the first bit line sense amplifier circuit through a first local input/output line, a first local driver that is electrically connected with the first local sense amplifier circuit through a first pre-global input/output line, and a sense amplifier and write driver that is electrically connected with the first local driver through a global input/output line, and the first local driver selectively electrical-disconnects the first pre-global input/output line from the global input/output line, based on an operation for the first memory cell.