Memory Dual ECC Architecture for Address-Linked Error Patterns
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Solution Overview
Problem
As memory capacity increases, producing memories with no defective memory cells becomes difficult, and existing error correction methods are inefficient in handling specific error patterns, leading to increased circuit area requirements.
Innovation Solution
A memory system with dual ECC engines that selectively activate based on access addresses to correct errors of specific patterns, and an optional data swap circuit to adjust data arrangement for optimal error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a single ECC engine is used to correct all error patterns, then the circuit area is reduced, but the error correction capability for specific error patterns deteriorates
Solution Approach 1:
The ECC engine is divided into multiple specialized sub-engines (first ECC engine for first error patterns, second ECC engine for second error patterns). Each sub-engine is optimized to handle specific error patterns efficiently, allowing the system to maintain high error correction capability while using smaller, more targeted circuit blocks rather than one large general-purpose ECC engine.
Solution Approach 2:
The system dynamically selects which ECC engine to activate based on the error pattern detected in the read data. The selection logic determines whether to use the first ECC engine or the second ECC engine depending on which error pattern is present, enabling adaptive error correction that optimizes both circuit utilization and correction effectiveness.
2Reliability
If multiple ECC engines are used to handle different error patterns, then the error correction capability is improved, but the circuit area increases
Solution Approach 1:
Each ECC engine is designed with specialized local quality optimized for its specific error pattern type. The first ECC engine has correction logic tailored for first error patterns, while the second ECC engine has logic tailored for second error patterns. This specialization allows each engine to be smaller and more efficient than a general-purpose engine, reducing the total circuit area while maintaining high correction capability.
Solution Approach 2:
The system changes operational parameters by selecting different ECC engines based on error pattern characteristics. Rather than using a fixed large-capability engine for all cases, the system adjusts which engine is active based on the specific error conditions, optimizing the balance between correction capability and resource usage for each operational context.
3Reliability
If error correction is performed for all error patterns, then the reliability is improved, but the resource utilization increases
Solution Approach 1:
Instead of using a single ECC engine capable of correcting all possible error patterns (excessive action), the system employs multiple specialized engines that each handle only their specific error patterns (partial action). This approach uses resources more efficiently by activating only the necessary correction capability for the actual error present, rather than always deploying full-capability correction logic.
Data Source
AI summary
A memory may include a memory core; a first ECC engine configured to correct an error having a first pattern, the error occurring in read data read from the memory core; and a second ECC engine configured to correct an error having a second pattern, the error occurring in the read data read from the memory core. One of the first ECC engine and the second ECC engine may be selectively activated based on an address used to access the memory core.