Semiconductor Memory Device Dummy Cell Data Placement
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Solution Overview
Problem
Flash memory devices experience interference and data reliability issues due to program disturb, leading to increased fail bits and reduced reliability, particularly in memory cells closer to the drain selection line.
Innovation Solution
The semiconductor memory device incorporates dummy memory cells and a peripheral circuit that stores data in a manner where a first type of data is stored in dummy cells and a second type of data, with fewer bits, is stored in memory cells, optimizing the placement of data to reduce interference and program disturb effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are arranged adjacent to each other in flash memory devices, then storage density is improved, but interference and program disturb occur between memory cells
Solution Approach 1:
The patent segments the memory array into different regions: a first memory region with memory cells having a first threshold voltage distribution and a second memory region with memory cells having a second threshold voltage distribution. This segmentation allows different memory cells to be programmed at different stages, reducing interference and program disturb effects while maintaining high storage density.
2Quantity of substance
If memory cells closer to drain selection line are used, then storage capacity is improved, but fail bits increase due to program disturb
Solution Approach 1:
The patent applies local quality by creating distinct threshold voltage distributions in different memory regions. Memory cells in the first region have a first threshold voltage distribution optimized for certain operations, while memory cells in the second region have a second threshold voltage distribution optimized for other operations. This local differentiation reduces program disturb effects on cells closer to the drain selection line while maintaining overall storage capacity.
3Productivity
If data is stored in all memory cells, then storage efficiency is improved, but interference between adjacent cells increases
Solution Approach 1:
The patent divides memory cells into two distinct regions with different threshold voltage characteristics. The first memory region stores data with a first threshold voltage distribution, while the second memory region stores data with a second threshold voltage distribution. This segmentation enables efficient data storage while minimizing interference between adjacent cells by programming different regions at different stages.
Data Source
AI summary
A semiconductor memory device includes a cell string including dummy memory cells and a plurality of memory cells in which n bit data is stored, and a peripherial circuit configured to store the n bit data in first memory cells, among the memory cells, store n−1 bit data in the rest of second memory cells, and store data which is not stored in the second memory cells in at least one of the dummy memory cells, among the dummy memory cells.