Memory Device Dummy Cell Programming for Temporal Read Errors

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Solution Overview

Problem

Memory devices experience temporal read errors after a long idle period due to high read current and low threshold voltage during the first read, which are not easily replicated in subsequent reads, posing a challenge in maintaining accurate threshold voltage determination.

Innovation Solution

The memory device employs a configuration with ground select lines, string select lines, word lines, and dummy word lines, where threshold voltages of switches and dummy memory cells are programmed as a first reference voltage and gradually increased, respectively, creating a down coupling environment to maintain memory strings in a strong inversion state, reducing temporal read errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory device is idle for a long period before read operation, then the read current becomes high and threshold voltage becomes low, but temporal read errors occur

Engineering Contradiction:
Improveread operation reliabilityVSAvoidthreshold voltage determination accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent performs a preliminary read operation before the actual read to refresh the memory channel and eliminate the effects of long idle periods. This preliminary action resets the threshold voltage and read current to normal levels, preventing temporal read errors in subsequent operations

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the electrical parameters (threshold voltage and read current) by performing an initial read operation that modifies the channel state. This parameter change ensures that subsequent reads occur under stable conditions with consistent threshold voltage levels

Inventive Principle:
Principle #35Parameter changes

2Reliability

If additional circuit components are added to prevent temporal read errors, then read operation reliability improves, but device complexity increases

Engineering Contradiction:
Improveread operation reliabilityVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses the existing memory structure to serve the dual purpose of data storage and error prevention. The read operation itself modifies the channel state to prevent temporal errors, eliminating the need for additional dedicated error prevention circuits

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent makes the read operation multi-functional: it serves both to retrieve data and to refresh the memory channel state. This universal approach prevents temporal read errors using the same circuitry already required for normal read operations

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively suppresses temporal read errors by maintaining memory strings in a strong inversion state, reducing de-trapping behavior and threshold voltage variations, ensuring accurate read current sensing and threshold voltage determination in subsequent operations without additional circuit area costs.

Implementation Method 1

programming a plurality of threshold voltages of a plurality of dummy memory cells on the dummy word lines as being gradually increased along a first direction or a second direction... creating a down coupling environment to maintain memory strings in a strong inversion state

Methodology Applied
Scientific EffectDown coupling:

Data Source

PatentUS12002522B2Memory device and operation method thereof
Publication Date: 2024.06.04 MACRONIX INTERNATIONAL CO LTD
  • US12002522B2 patent drawing
  • US12002522B2 patent drawing
  • US12002522B2 patent drawing

AI summary

A memory device and an operation method thereof are provided. The operation method includes: in a programming operation, programming a plurality of threshold voltages of a plurality of switches on a plurality of string select lines and a plurality of ground select lines as a first reference threshold voltage, and programming a plurality of threshold voltages of a plurality of dummy memory cells on a plurality of dummy word lines as being gradually increased along a first direction or a second direction, and the threshold voltages of the dummy memory cells being higher than the first reference threshold voltage; wherein the first direction being from the string select lines to a plurality of word lines and the second direction being from the ground select lines to the word lines.