3D Semiconductor Memory Device Dummy Channel Isolation
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in increasing integration density and reliability, particularly in three-dimensional (3D) vertical stack structures, where maintaining high reliability and preventing electrical leakage are key issues.
Innovation Solution
The semiconductor memory device employs a substrate with alternately stacked interlayer insulating layers and gate electrodes, featuring cell and dummy channel structures that pass through the stack structure, with isolation layers ensuring electrical isolation and connection to the substrate, and a method to determine electrical connectivity by applying an electric charge and measuring current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If three-dimensional vertical stack structures are used to increase integration density, then the integration degree is improved, but electrical leakage and reliability issues worsen
Solution Approach 1:
The connection region is divided into multiple blocks (first block, second block, third block) with alternating cell array regions and dummy cell regions. This segmentation allows electrical connections to be distributed across multiple isolated paths, preventing leakage while maintaining high integration density in the vertical stack structure.
Solution Approach 2:
Different regions are assigned different functions: cell array regions contain active memory cells while dummy cell regions contain dummy channel structures that are electrically isolated. This local differentiation ensures that only necessary regions conduct electricity, preventing leakage in the connection region while maintaining high density in active areas.
2Quantity of substance
If more channel structures are added to increase integration density, then the integration degree is improved, but process complexity and manufacturing difficulty worsen
Solution Approach 1:
The same stack structure (alternating insulating layers and gate electrodes) serves multiple functions: it provides the vertical channel structure for memory cells, establishes electrical connections through the substrate, and enables isolation of dummy channels through selective doping. This multi-functionality increases integration density without proportionally increasing process complexity.
Solution Approach 2:
The invention transitions from two-dimensional planar structures to three-dimensional vertical stack structures with channels extending through multiple layers. This dimensional change allows integration density to increase vertically rather than horizontally, reducing the area per memory cell while maintaining manageable process complexity through standardized vertical fabrication steps.
3Reliability
If dummy channel structures are electrically isolated from the substrate, then electrical leakage is prevented, but manufacturing precision requirements increase
Solution Approach 1:
The dummy channel structures are formed with different doping concentrations in advance, before final device assembly. The isolation is achieved through selective doping during the formation process rather than requiring post-formation isolation layers, which reduces manufacturing precision requirements while ensuring reliable electrical isolation.
Data Source
AI summary
A semiconductor memory device including a substrate including a first block and a second block each having a cell array region and a connection region, a stack including insulating layers and gate electrodes and extending from the cell array region to the connection region, first cell channel structures in the cell array region of the first block and passing through the stack to be electrically connected to the substrate, first dummy channel structures in the connection region of the first block and passing through the stack, second cell channel structures in the cell array region of the second block and passing through the stack, and second dummy channel structures in the connection region of the second block and passing through the stack may be provided. The first dummy channel structures are electrically insulated from the substrate, while the second dummy channel structures are electrically connected to the substrate.