Non-volatile Memory Dummy Electrode Contact Structure
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Solution Overview
Problem
The integration and fabrication of non-volatile memory devices with multi-layer structures are complicated due to the complexity of the contact structure, limiting their integration and quality.
Innovation Solution
A non-volatile memory device with a simplified contact structure, featuring semiconductor pillars, control gate electrodes with protrusions, dummy electrodes, via plugs, and wordlines, along with charge storage and insulation layers, is developed, allowing for improved integration and quality through a method that includes stacking control gate and dummy electrodes, forming semiconductor pillars via excimer laser annealing, and planarizing interlayer insulation layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a multi-layer structure is used to increase integration, then the data processing capability is improved, but the contact structure becomes more complex and fabrication becomes more difficult
Solution Approach 1:
The contact structure is segmented into separate via plugs and wordline components. The via plugs are formed to penetrate through the control gate electrodes and dummy electrodes, and the wordlines are formed separately on top of the via plugs. This segmentation allows each component to be optimized independently, simplifying the overall fabrication process while maintaining multi-layer integration.
Solution Approach 2:
Dummy electrodes are introduced as intermediary elements between the control gate electrodes and the via plugs. These dummy electrodes facilitate the formation of via plugs that need to penetrate through multiple layers, providing a structured pathway that simplifies the contact formation process in multi-layer configurations.
2Quantity of substance
If integration density is increased by vertical stacking, then the memory capacity is improved, but the fabrication process becomes more complicated
Solution Approach 1:
Dummy electrodes are formed in advance during the electrode stacking process, before the via plug formation. This preliminary action prepares the structural framework that will guide subsequent via plug and wordline formation, making the overall fabrication process more systematic and manageable despite the multi-layer complexity.
Solution Approach 2:
The patent utilizes vertical stacking in the third dimension to increase memory capacity through multiple layers of control gate electrodes and semiconductor pillars. By organizing structures vertically rather than only horizontally, the design achieves higher integration density while using standardized fabrication techniques applicable to each layer.
3Reliability
If via plugs penetrate multiple layers to connect control gate electrodes, then the electrical connection is improved, but the alignment precision requirement increases
Solution Approach 1:
Dummy electrodes serve as intermediary alignment references that facilitate precise via plug formation. By providing clearly defined structural markers at each layer level, the dummy electrodes enable accurate alignment of via plugs penetrating through multiple control gate electrode layers, ensuring reliable electrical connections without requiring excessive manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the integration density and reliability of non-volatile memory devices by simplifying the contact structure and improving the crystal structure of semiconductor pillars, leading to increased data processing capabilities.
Implementation Method 1
forming a plurality of semiconductor pillars penetrating the plurality of control gate electrodes; forming a plurality of via plugs that are connected to the plurality of control gate electrodes
Implementation Method 2
forming semiconductor pillars via excimer laser annealing
Data Source
AI summary
Provided are a non-volatile memory device and a method of fabricating the same. The non-volatile memory device may include a substrate and a plurality of semiconductor pillars on the substrate. A plurality of control gate electrodes may be stacked on the substrate and intersecting the plurality of semiconductor pillars. A plurality of dummy electrodes may be stacked adjacent to the plurality of control gate electrodes on the substrate, the plurality of dummy electrodes being spaced apart from the plurality of control gate electrodes. A plurality of via plugs may be connected to the plurality of control gate electrodes. A plurality of wordlines may be on the plurality of via plugs. Each of the plurality of via plugs may penetrate a corresponding one of the plurality of control gate electrodes and at least one of the plurality of dummy electrodes.