Semiconductor Memory Device Dummy Transistor Threshold Voltage Distribution
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in improving electrical characteristics, particularly in narrowing the threshold voltage distribution of dummy cells to enhance memory cell performance, as they often rely on select transistors rather than dummy transistors for switching functions.
Innovation Solution
The semiconductor memory device incorporates first and second dummy transistors coupled to bit lines and common source lines, respectively, with main cell transistors between select transistors, and a peripheral circuit that controls the operation of these transistors to optimize program, read, and erase operations, thereby minimizing current consumption and improving electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dummy cells are coupled between bit line and memory cell to improve electrical characteristics, then electrical characteristics of memory cell are improved, but threshold voltage distribution of dummy cells becomes wide which degrades performance
Solution Approach 1:
The patent applies different doping concentrations to different regions of the dummy cell structure. Specifically, the first dummy transistor has a first doping concentration in its channel region, while the second dummy transistor has a second doping concentration different from the first. This local differentiation of properties allows each dummy transistor to contribute differently to the overall electrical characteristics while maintaining a narrow threshold voltage distribution.
Solution Approach 2:
The patent changes the doping concentration parameter in the dummy cell structure by implementing different doping concentrations in the channel regions of the first and second dummy transistors. This parameter change enables optimization of the threshold voltage distribution while maintaining improved electrical characteristics of the memory cell.
2Device complexity
If select transistors are used for switching functions, then device complexity is reduced, but electrical characteristics and threshold voltage distribution are not optimized
Solution Approach 1:
The patent implements dummy cells that serve multiple functions: they act as switching elements during program operations, provide electrical characteristic optimization for memory cells, and maintain narrow threshold voltage distributions. The first and second dummy transistors work together with select transistors to achieve these multiple objectives simultaneously.
Solution Approach 2:
The patent segments the switching and control functions by introducing separate first and second dummy transistors with different doping concentrations. This segmentation allows independent optimization of each dummy transistor's contribution to electrical characteristics while maintaining overall device functionality.
Data Source
AI summary
A semiconductor memory device includes a first dummy transistor coupled to a bit line, a first select transistor formed where a first selection line surrounds a vertical channel layer, a second dummy transistor coupled to a common source line, a second select transistor formed where a second selection line surrounds the vertical channel layer, and main cell transistors coupled between the first and second select transistors.