Non-volatile Memory Sector Capacity via Dummy Word Line Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Increasing sector capacity in flash memory devices while maintaining chip size and reading speed, and reducing drain disturb and layout area requirements, is challenging with existing methods that either lengthen word lines, increase bit line resistance, or require more layout space.
Innovation Solution
The implementation of first and second word line groups with dummy word lines disposed between them, and bit lines intersecting these groups, allows for variable sector capacity without increasing chip size, maintaining reading speed, and reducing drain disturb time, by applying voltage to dummy word lines during erase operations to prevent memory cell disturbance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of bit lines is multiplied by four times to increase sector capacity, then the sector capacity is increased, but the bit line resistance increases and reading speed decreases
Solution Approach 1:
The memory cell array is divided into two separate memory cell arrays, each with its own bit line group. This segmentation allows each bit line group to handle fewer memory cells, reducing the effective bit line resistance and maintaining reading speed while still achieving increased sector capacity through the combined capacity of both arrays.
2Quantity of substance
If the number of word lines is multiplied by four times to increase sector capacity, then the sector capacity is increased, but the time needed for word line to reach predetermined voltage is doubled and reading speed decreases
Solution Approach 1:
The memory cell array is divided into two separate memory cell arrays, each with its own word line group. This segmentation allows each word line group to drive fewer memory cells, reducing the time needed for word lines to reach the predetermined voltage and maintaining reading speed while achieving increased sector capacity through the combined capacity of both arrays.
3Quantity of substance
If four typical sectors are used to resemble one sector to increase sector capacity, then the sector capacity is increased, but the layout area increases
Solution Approach 1:
Two separate memory cell arrays are merged into a single memory device with shared control circuitry and a common well region. This merging allows the combined sector capacity of both arrays to be achieved while using less total layout area than would be required for four separate sectors, as the control circuits and support structures are shared between the two arrays.
Data Source
AI summary
Provided is a non-volatile semiconductor device. The non-volatile semiconductor memory devices including: first and second word line groups disposed in parallel; dummy word lines disposed between the first and second word line groups; a first bit line group intersecting the first word line group; and a second bit line group intersecting the second word line group, wherein the first and second word line groups, the first and second bit line groups, and the dummy word lines are disposed on a same well.