3D Memory Dummy Word Line Voltage Control

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Solution Overview

Problem

Three-dimensional (3D) memory devices experience read disturbance in dummy word lines after heavy read cycles, primarily due to the down-coupling effect caused by the potential difference between string select lines/global select lines and dummy word lines, leading to hot carrier injection and increased read disturbance.

Innovation Solution

The proposed operation method for a memory device involves increasing the dummy word line voltage to a first level during the pre-turn on period, then to a higher second level during the read period, and subsequently lowering it after the read period is completed. This voltage management reduces the vertical electronic field and mitigates read disturbance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the pre-turn on period of SSLs or GSLs is closed and pass voltage of unselected word lines is lower than threshold voltages of SSLs or GSLs, then the down-coupling effect occurs causing large channel potential difference, but this leads to hot carrier injection and read disturbance in dummy word lines

Engineering Contradiction:
Improveread disturbanceVSAvoidvertical electronic field
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by raising the dummy word line voltage to a first dummy word line voltage during a pre-turn on period before the actual read operation. This preliminary voltage adjustment reduces the vertical electronic field at dummy word lines before hot carrier injection can occur, thereby preventing read disturbance while maintaining normal read operation performance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the voltage parameter of dummy word lines dynamically through three distinct voltage levels: a first dummy word line voltage during pre-turn on period, a second dummy word line voltage during read period, and a lowered voltage after read period. These parameter changes optimize the electrical characteristics to prevent down-coupling effect and hot carrier injection while maintaining read operation efficiency

Inventive Principle:
Principle #35Parameter changes

2Reliability

If dummy word line voltage is increased to reduce vertical electronic field and prevent hot carrier injection, then read disturbance is reduced, but additional voltage control steps increase operation complexity

Engineering Contradiction:
Improveread disturbanceVSAvoidvoltage control
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent integrates the dummy word line voltage adjustment into the existing pre-turn on period of the read operation, utilizing the time window that already exists in the memory device's operation cycle. This approach adds minimal control complexity while effectively preventing read disturbance through timely voltage adjustment

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements periodic voltage adjustment to dummy word lines that synchronizes with the read operation cycles. The voltage is raised during pre-turn on period, maintained during read period, and lowered after read period, creating a rhythmic control pattern that matches the operational needs without requiring continuous complex control

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method effectively reduces read disturbance in dummy word lines by minimizing the vertical electronic field and maintaining the integrity of threshold voltage variations, thereby enhancing the reliability and performance of 3D memory devices.

Implementation Method 1

Analysis reveals that when the pre-turn on period of the string select lines (SSLs) or the global select lines (GSLs) is closed, if the pass voltage (Vpass) of the unselected word lines is lower than the threshold voltages of the SSLs or GSLs, then the down-coupling effect occurs. This may cause large channel potential difference between the SSLs and the dummy word lines, or large channel potential difference between the GSLs and the dummy word lines; and has a high vertical electronic field at the dummy word lines.

Methodology Applied
Scientific EffectVertical electronic field: Electric Field

Implementation Method 2

Hot carrier injection is likely to occur and then read disturbance occurs.

Methodology Applied
Scientific EffectHot carrier injection:

Data Source

PatentUS12308075B2Operation method for a memory device
Publication Date: 2025.05.20 MACRONIX INTERNATIONAL CO LTD
  • US12308075B2 patent drawing
  • US12308075B2 patent drawing
  • US12308075B2 patent drawing

AI summary

An operation method for a memory device is provided. The operation method includes: increasing a dummy word line voltage to a first dummy word line voltage during a pre-turn on period; increasing the dummy word line voltage from the first dummy word line voltage to a second dummy word line voltage during a read period; and lowering the dummy word line voltage after the read period is finished. Wherein the first dummy word line voltage is lower than the second dummy word line voltage.